Peripheral MCU configuration for the STM32F769I-DISCO board. More...
Peripheral MCU configuration for the STM32F769I-DISCO board.
Definition in file periph_conf.h.
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
#include "cfg_usb_otg_fs.h"
Go to the source code of this file.
#define | CONFIG_BOARD_HAS_LSE 1 |
#define | CONFIG_BOARD_HAS_HSE 1 |
#define | CONFIG_CLOCK_HSE MHZ(25) |
UART configuration | |
#define | UART_0_ISR (isr_usart1) |
#define | UART_NUMOF ARRAY_SIZE(uart_config) |
static const uart_conf_t | uart_config [] |
FMC configuration | |
#define | FMC_BANK_NUMOF ARRAY_SIZE(fmc_bank_config) |
Number of configured FMC banks. | |
static const fmc_conf_t | fmc_config |
FMC controller configuration. | |
static const fmc_bank_conf_t | fmc_bank_config [] |
FMC Bank configuration. | |
#define CONFIG_BOARD_HAS_HSE 1 |
Definition at line 29 of file periph_conf.h.
#define CONFIG_BOARD_HAS_LSE 1 |
Definition at line 24 of file periph_conf.h.
#define CONFIG_CLOCK_HSE MHZ(25) |
Definition at line 34 of file periph_conf.h.
#define FMC_BANK_NUMOF ARRAY_SIZE(fmc_bank_config) |
Number of configured FMC banks.
Definition at line 189 of file periph_conf.h.
#define UART_0_ISR (isr_usart1) |
Definition at line 64 of file periph_conf.h.
#define UART_NUMOF ARRAY_SIZE(uart_config) |
Definition at line 66 of file periph_conf.h.
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FMC Bank configuration.
The board has a SDRAM MT48LC4M32B2B5-6A with 128 MBit on-board. It is organized in 4 banks of 1M x 32 bits each and connected to bank 5 at address 0xc0000000.
Definition at line 152 of file periph_conf.h.
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FMC controller configuration.
Definition at line 76 of file periph_conf.h.
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Definition at line 51 of file periph_conf.h.