Common CPU specific definitions for all SAM3/SAM4x based CPUs. More...
Common CPU specific definitions for all SAM3/SAM4x based CPUs.
Common CPU specific definitions for all SAM3/SAM4x based CPUs
Definition in file periph_cpu_common.h.
#include "cpu.h"
Go to the source code of this file.
Data Structures | |
struct | timer_conf_t |
Timer device configuration. More... | |
struct | uart_conf_t |
UART device configuration. More... | |
#define | TIMER_CHANNEL_NUMOF (1) |
We use one channel for each defined timer. | |
#define | GPIO_MODE(io, pu, od) |
Generate GPIO mode bitfields. | |
enum | gpio_mux_t { GPIO_MUX_A = 0 , GPIO_MUX_B = 1 } |
GPIO mux configuration. More... | |
enum | { PA = 0 , PB = 1 , PC = 2 } |
Available ports on the SAM3/SAM4S based MCUs. More... | |
void | gpio_init_mux (gpio_t pin, gpio_mux_t mux) |
Configure the given GPIO pin to be used with the given MUX setting. | |
#define GPIO_MODE | ( | io, | |
pu, | |||
od ) |
Generate GPIO mode bitfields.
We use 3 bit to determine the pin functions:
Definition at line 56 of file periph_cpu_common.h.
#define TIMER_CHANNEL_NUMOF (1) |
We use one channel for each defined timer.
While the peripheral provides three channels, the current interrupt flag handling leads to a race condition where calling timer_clear() on one channel can disable a pending flag for other channels. Until resolved, limit the peripheral to only one channel.
Definition at line 46 of file periph_cpu_common.h.
anonymous enum |
Available ports on the SAM3/SAM4S based MCUs.
Enumerator | |
---|---|
PA | port A |
PB | port B |
PC | port C |
Definition at line 92 of file periph_cpu_common.h.
enum gpio_mux_t |
GPIO mux configuration.
Enumerator | |
---|---|
GPIO_MUX_A | alternate function A |
GPIO_MUX_B | alternate function B |
Definition at line 80 of file periph_cpu_common.h.
void gpio_init_mux | ( | gpio_t | pin, |
gpio_mux_t | mux ) |
Configure the given GPIO pin to be used with the given MUX setting.
[in] | pin | GPIO pin to configure |
[in] | mux | MUX setting to use |