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Nordic nRF9160 MCU

Nordic nRF9160 family of CPUs. More...

Detailed Description

Nordic nRF9160 family of CPUs.

Files

file  cpu_conf.h
 nRF9160 specific CPU configuration
 
file  periph_cpu.h
 nRF9160 specific definitions for handling peripherals
 

ARM Cortex-M specific CPU configuration

#define CPU_DEFAULT_IRQ_PRIO   (1U)
 Default ARM IRQ priority.
 
#define CPU_FLASH_BASE   (0x00000000)
 ROM Base Address.
 
#define CPU_IRQ_NUMOF   (65U)
 nRF9160 specific IRQ count
 

Flash page configuration

#define FLASHPAGE_SIZE   (4096U)
 Size of a page in bytes.
 
#define FLASHPAGE_NUMOF   (256U)
 Total number of flash pages.
 
#define FLASHPAGE_WRITE_BLOCK_SIZE   (4U)
 Minimum block size.
 
#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT   (4U)
 Mandatory alignment.
 

Macro Definition Documentation

◆ CPU_DEFAULT_IRQ_PRIO

#define CPU_DEFAULT_IRQ_PRIO   (1U)

Default ARM IRQ priority.

Definition at line 39 of file cpu_conf.h.

◆ CPU_FLASH_BASE

#define CPU_FLASH_BASE   (0x00000000)

ROM Base Address.

Definition at line 40 of file cpu_conf.h.

◆ CPU_IRQ_NUMOF

#define CPU_IRQ_NUMOF   (65U)

nRF9160 specific IRQ count

Definition at line 42 of file cpu_conf.h.

◆ FLASHPAGE_NUMOF

#define FLASHPAGE_NUMOF   (256U)

Total number of flash pages.

Definition at line 50 of file cpu_conf.h.

◆ FLASHPAGE_SIZE

#define FLASHPAGE_SIZE   (4096U)

Size of a page in bytes.

Definition at line 49 of file cpu_conf.h.

◆ FLASHPAGE_WRITE_BLOCK_ALIGNMENT

#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT   (4U)

Mandatory alignment.

Definition at line 57 of file cpu_conf.h.

◆ FLASHPAGE_WRITE_BLOCK_SIZE

#define FLASHPAGE_WRITE_BLOCK_SIZE   (4U)

Minimum block size.

Definition at line 55 of file cpu_conf.h.