DMA CPU specific definitions for the STM32 family.
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◆ DMA_CHAN_CONFIG_UNSUPPORTED
#define DMA_CHAN_CONFIG_UNSUPPORTED (UINT8_MAX) |
DMA channel/trigger configuration for DMA peripherals without channel/trigger filtering such as the stm32f1 and stm32f3.
Definition at line 96 of file cpu_dma.h.
◆ DMA_DATA_WIDTH_BYTE
#define DMA_DATA_WIDTH_BYTE (0x00) |
◆ DMA_DATA_WIDTH_HALF_WORD
#define DMA_DATA_WIDTH_HALF_WORD (0x01) |
Half word width (2 bytes)
Definition at line 112 of file cpu_dma.h.
◆ DMA_DATA_WIDTH_WORD
#define DMA_DATA_WIDTH_WORD (0x02) |
Word width (4 bytes)
Definition at line 113 of file cpu_dma.h.
◆ DMA_INC_BOTH_ADDR
DMA increment source + destination address.
Definition at line 104 of file cpu_dma.h.
◆ DMA_INC_DST_ADDR
#define DMA_INC_DST_ADDR (0x08) |
DMA increment destination address.
Definition at line 103 of file cpu_dma.h.
◆ DMA_INC_SRC_ADDR
#define DMA_INC_SRC_ADDR (0x04) |
DMA increment source address.
Definition at line 102 of file cpu_dma.h.
◆ dma_t
◆ dma_burst_t
Burst Transfer modes for F2/F4/F7.
Enumerator |
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DMA_BURST_SINGLE | single transfer
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DMA_BURST_INCR4 | incremental burst of 4 beats
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DMA_BURST_INCR8 | incremental burst of 8 beats
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DMA_BURST_INCR16 | incremental burst of 16 beats
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Definition at line 75 of file cpu_dma.h.
◆ dma_fifo_thresh_t
Threshold selection in FIFO mode for F2/F4F7.
Enumerator |
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DMA_FIFO_FULL_1_4 | 1/4 full FIFO
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DMA_FIFO_FULL_1_2 | 1/2 full FIFO
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DMA_FIFO_FULL_3_4 | 3/4 full FIFO
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DMA_FIFO_FULL | Full FIFO.
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Definition at line 85 of file cpu_dma.h.
◆ dma_mode_t
DMA modes.
Enumerator |
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DMA_PERIPH_TO_MEM | Peripheral to memory.
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DMA_MEM_TO_PERIPH | Memory to peripheral.
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DMA_MEM_TO_MEM | Memory to memory.
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Definition at line 66 of file cpu_dma.h.