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periph_conf.h
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1/*
2 * Copyright (C) 2020 Freie Universität Berlin
3 * Copyright (C) 2023 HAW Hamburg
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
23#ifndef PERIPH_CONF_H
24#define PERIPH_CONF_H
25
26#include "periph_cpu.h"
27#include "cfg_clock_32_0.h"
28#include "cfg_rtt_default.h"
29#include "cfg_timer_default.h"
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
39static const uart_conf_t uart_config[] = {
40 {
41 .dev = NRF_UARTE0,
42 .rx_pin = GPIO_PIN(0, 24),
43 .tx_pin = GPIO_PIN(0, 25),
44#ifdef MODULE_PERIPH_UART_HW_FC
45 .rts_pin = GPIO_UNDEF,
46 .cts_pin = GPIO_UNDEF,
47#endif
48 .irqn = UARTE0_UART0_IRQn,
49 },
50};
51
52#define UART_0_ISR (isr_uart0)
53
54#define UART_NUMOF ARRAY_SIZE(uart_config)
61static const spi_conf_t spi_config[] = {
62 {
63 .dev = NRF_SPIM0,
64 .sclk = 14,
65 .mosi = 13,
66 .miso = 15,
67 }
68};
69
70#define SPI_NUMOF ARRAY_SIZE(spi_config)
77static const i2c_conf_t i2c_config[] = {
78 {
79 .dev = NRF_TWIM1,
80 .scl = 11,
81 .sda = 12,
82 .speed = I2C_SPEED_NORMAL
83 }
84};
85#define I2C_NUMOF ARRAY_SIZE(i2c_config)
88#ifdef __cplusplus
89}
90#endif
91
92#endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
Common clock configuration for the nRF52 based boards.
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219