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spi.h
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1/*
2 * SPDX-FileCopyrightText: 2014-2016 Freie Universität Berlin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
90
91#include <endian.h>
92#include <errno.h>
93#include <stdbool.h>
94#include <stddef.h>
95#include <stdint.h>
96
97#include "periph_cpu.h"
98#include "periph_conf.h"
99#include "periph/gpio.h"
100
101#ifdef __cplusplus
102extern "C" {
103#endif
104
109#ifndef CONFIG_SPI_DMA_THRESHOLD_BYTES
110#define CONFIG_SPI_DMA_THRESHOLD_BYTES 16
111#endif
112
116#ifndef SPI_DEV
117#define SPI_DEV(x) (x)
118#endif
119
123#ifndef SPI_UNDEF
124#define SPI_UNDEF (UINT_FAST8_MAX)
125#endif
126
130#ifndef SPI_CS_UNDEF
131#define SPI_CS_UNDEF (GPIO_UNDEF)
132#endif
133
141#ifndef SPI_HWCS
142#define SPI_HWCS(x) (SPI_CS_UNDEF)
143#endif
144
148#ifndef HAVE_SPI_T
149typedef uint_fast8_t spi_t;
150#endif
151
156#ifndef HAVE_SPI_CS_T
157typedef gpio_t spi_cs_t;
158#endif
159
166enum {
167 SPI_OK = 0,
172};
173
190#ifndef HAVE_SPI_MODE_T
197#endif
198
206#ifndef HAVE_SPI_CLK_T
214#endif
215
238void spi_init(spi_t bus);
239
257void spi_init_pins(spi_t bus);
258
278int spi_init_cs(spi_t bus, spi_cs_t cs);
279
280#if defined(MODULE_PERIPH_SPI_RECONFIGURE) || DOXYGEN
281
302void spi_deinit_pins(spi_t dev);
303
304#if DOXYGEN
305
316gpio_t spi_pin_miso(spi_t dev);
317
328gpio_t spi_pin_mosi(spi_t dev);
329
340gpio_t spi_pin_clk(spi_t dev);
341
342#endif /* DOXYGEN */
343#endif /* MODULE_PERIPH_SPI_RECONFIGURE */
344
345#if defined(MODULE_PERIPH_SPI_GPIO_MODE) || DOXYGEN
346
355
366int spi_init_with_gpio_mode(spi_t bus, const spi_gpio_mode_t* mode);
367#endif
368
386void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk);
387
396void spi_release(spi_t bus);
397
409uint8_t spi_transfer_byte(spi_t bus, spi_cs_t cs, bool cont, uint8_t out);
410
422void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
423 const void *out, void *in, size_t len);
424
439uint8_t spi_transfer_reg(spi_t bus, spi_cs_t cs, uint8_t reg, uint8_t out);
440
455void spi_transfer_regs(spi_t bus, spi_cs_t cs, uint8_t reg,
456 const void *out, void *in, size_t len);
457
469static inline uint16_t spi_transfer_u16_be(spi_t bus, spi_cs_t cs, bool cont, uint16_t host_number)
470{
471 const uint16_t send = htobe16(host_number);
472 uint16_t receive;
473 spi_transfer_bytes(bus, cs, cont, &send, &receive, sizeof(receive));
474 return be16toh(receive);
475}
476
477#ifdef __cplusplus
478}
479#endif
480
spi_clk_t
Definition periph_cpu.h:348
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition periph_cpu.h:353
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition periph_cpu.h:352
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition periph_cpu.h:350
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition periph_cpu.h:351
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition periph_cpu.h:349
libc header for endian conversion
Low-level GPIO peripheral driver interface definitions.
#define ENXIO
No such device or address.
Definition errno.h:131
#define EINVAL
Invalid argument.
Definition errno.h:96
gpio_mode_t
Available pin modes.
Definition periph_cpu.h:96
int spi_init_cs(spi_t bus, spi_cs_t cs)
Initialize the given chip select pin.
gpio_t spi_pin_miso(spi_t dev)
Get the MISO pin of the given SPI bus.
uint8_t spi_transfer_reg(spi_t bus, spi_cs_t cs, uint8_t reg, uint8_t out)
Transfer one byte to/from a given register address.
void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
Start a new SPI transaction.
gpio_t spi_pin_mosi(spi_t dev)
Get the MOSI pin of the given SPI bus.
int spi_init_with_gpio_mode(spi_t bus, const spi_gpio_mode_t *mode)
Initialize MOSI/MISO/SCLK pins with adapted GPIO modes.
gpio_t spi_pin_clk(spi_t dev)
Get the CLK pin of the given SPI bus.
void spi_transfer_regs(spi_t bus, spi_cs_t cs, uint8_t reg, const void *out, void *in, size_t len)
Transfer a number of bytes to/from a given register address.
uint8_t spi_transfer_byte(spi_t bus, spi_cs_t cs, bool cont, uint8_t out)
Transfer one byte on the given SPI bus.
static uint16_t spi_transfer_u16_be(spi_t bus, spi_cs_t cs, bool cont, uint16_t host_number)
Transfer a 16 bit number in big endian byte order.
Definition spi.h:469
void spi_release(spi_t bus)
Finish an ongoing SPI transaction by releasing the given SPI bus.
void spi_init_pins(spi_t bus)
Initialize the used SPI bus pins, i.e.
void spi_deinit_pins(spi_t dev)
Change the pins of the given SPI bus back to plain GPIO functionality.
void spi_init(spi_t bus)
Basic initialization of the given SPI bus.
void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont, const void *out, void *in, size_t len)
Transfer a number bytes using the given SPI bus.
gpio_t spi_cs_t
Chip select pin type overlaps with gpio_t so it can be casted to this.
Definition spi.h:157
@ SPI_OK
everything went as planned
Definition spi.h:167
@ SPI_NOCS
invalid chip select line specified
Definition spi.h:169
@ SPI_NOCLK
selected clock value is not supported
Definition spi.h:171
@ SPI_NODEV
invalid SPI bus specified
Definition spi.h:168
@ SPI_NOMODE
selected mode is not supported
Definition spi.h:170
static ssize_t send(int socket, const void *buffer, size_t length, int flags)
Send a message on a socket.
Definition socket.h:456
uint16_t be16toh(uint16_t big_endian_16bits)
big endian to host, 16 bit
uint16_t htobe16(uint16_t host_16bits)
host to big endian, 16 bit
spi_mode_t
Support SPI modes.
Definition periph_cpu.h:39
@ SPI_MODE_0
CPOL=0, CPHA=0.
Definition periph_cpu.h:40
@ SPI_MODE_2
CPOL=1, CPHA=0.
Definition periph_cpu.h:42
@ SPI_MODE_1
CPOL=0, CPHA=1.
Definition periph_cpu.h:41
@ SPI_MODE_3
CPOL=1, CPHA=1.
Definition periph_cpu.h:43
SPI gpio mode.
Definition spi.h:350
gpio_mode_t mosi
GPIO mode used for MOSI pin.
Definition spi.h:351
gpio_mode_t miso
GPIO mode used for MISO pin.
Definition spi.h:352
gpio_mode_t sclk
GPIO mode used for SCLK pin.
Definition spi.h:353