Register definitions for the Gaisler GRETH Ethernet MAC. More...

Detailed Description

Register definitions for the Gaisler GRETH Ethernet MAC.

Author: Matvii Ivashchenko

Definition in file greth_regs.h.

#include <stdint.h>

Include dependency graph for greth_regs.h:

Data Structures
struct	greth_regs_t
	GRETH APB register map. More...

Control register bits (offset 0x00)
#define	GRETH_CTRL_TXEN (1u << 0)
	TX enable: start/continue DMA TX.

#define	GRETH_CTRL_RXEN (1u << 1)
	RX enable: start/continue DMA RX.

#define	GRETH_CTRL_TXIRQEN (1u << 2)
	TX interrupt enable.

#define	GRETH_CTRL_RXIRQEN (1u << 3)
	RX interrupt enable.

#define	GRETH_CTRL_FD (1u << 4)
	Full duplex mode.

#define	GRETH_CTRL_PRO (1u << 5)
	Promiscuous mode.

#define	GRETH_CTRL_RST (1u << 6)
	Software reset (self-clearing)

#define	GRETH_CTRL_SPD (1u << 7)
	Speed: 1=100 Mbps, 0=10 Mbps.

#define	GRETH_CTRL_GB (1u << 8)
	Gigabit mode (1000 Mbps)

#define	GRETH_CTRL_EDCLDIS (1u << 14)
	EDCL disable.

#define	GRETH_CTRL_GBIT_CAP (1u << 27)
	Gigabit capable (read-only)

#define	GRETH_CTRL_EDCL_CAP (1u << 26)
	EDCL present (read-only, bit 26 not 31)

Status register bits (offset 0x04)
Write 1 to clear each bit.
#define	GRETH_STATUS_RXERR (1u << 0)
	RX error occurred.

#define	GRETH_STATUS_TXERR (1u << 1)
	TX error occurred.

#define	GRETH_STATUS_RXIRQ (1u << 2)
	RX frame received (DMA done)

#define	GRETH_STATUS_TXIRQ (1u << 3)
	TX frame sent (DMA done)

#define	GRETH_STATUS_PHYIRQ (1u << 4)
	PHY link status change.

MDIO register bit fields (offset 0x10)
#define	GRETH_MDIO_OP_WR (1u)
	Write operation.

#define	GRETH_MDIO_OP_RD (2u)
	Read operation.

#define	GRETH_MDIO_BUSY (1u << 3)
	Transaction in progress.

#define	GRETH_MDIO_NVALID (1u << 4)
	Read data not valid.

#define	GRETH_MDIO_REGSHIFT (6u)
	PHY register address shift.

#define	GRETH_MDIO_PHYSHIFT (11u)
	PHY device address shift.

#define	GRETH_MDIO_DATASHIFT (16u)
	Read/write data shift.

Buffer descriptor control word bits
TX and RX descriptors share the same ctrl layout in bits 12:0. Error bits in 18:14 differ between TX and RX.
#define	GRETH_BD_LEN_MASK (0x7FFu)
	bits[10:0]: frame byte length

#define	GRETH_BD_EN (1u << 11)
	Enable: descriptor owned by DMA.

#define	GRETH_BD_WR (1u << 12)
	Wrap: last descriptor, next = first.

#define	GRETH_BD_IE (1u << 13)
	Interrupt enable after processing.

TX descriptor error bits (set by DMA on error)
#define	GRETH_TXBD_ERR_UE (1u << 14)
	Underrun error.

#define	GRETH_TXBD_ERR_AL (1u << 15)
	Attempt limit exceeded.

#define	GRETH_TXBD_ERR_LC (1u << 16)
	Late collision.

#define	GRETH_TXBD_ERR_MASK
	All TX descriptor error bits combined.

RX descriptor error bits (set by DMA on error)
#define	GRETH_RXBD_ERR_AE (1u << 14)
	Alignment error.

#define	GRETH_RXBD_ERR_FT (1u << 15)
	Frame too long.

#define	GRETH_RXBD_ERR_CRC (1u << 16)
	CRC error.

#define	GRETH_RXBD_ERR_OE (1u << 17)
	FIFO overrun.

#define	GRETH_RXBD_ERR_LE (1u << 18)
	Length mismatch.

#define	GRETH_RXBD_ERR_MASK
	All RX descriptor error bits combined.

PHY MII register numbers (IEEE 802.3)
#define	GRETH_MII_CTRL (0)
	Basic Control.

#define	GRETH_MII_STATUS (1)
	Basic Status.

#define	GRETH_MII_ADV (4)
	Auto-Negotiation Advertisement.

#define	GRETH_MII_LPA (5)
	Link Partner Ability.

#define	GRETH_MII_CTRL_RST (1u << 15)
	Software reset.

#define	GRETH_MII_CTRL_ANEG (1u << 12)
	Auto-negotiation enable.

#define	GRETH_MII_CTRL_SPD100 (1u << 13)
	100 Mbps (if no aneg)

#define	GRETH_MII_CTRL_FD (1u << 8)
	Full duplex (if no aneg)

#define	GRETH_MII_STATUS_ANEG_DONE (1u << 5)
	Auto-negotiation complete.

#define	GRETH_MII_STATUS_LINK (1u << 2)
	Link status.

Auto-negotiation Advertisement / Link Partner Ability bits (regs 4/5)
These are the capability bits in the standard MII AN advertisement register (reg 4) and the link partner ability register (reg 5). AND both registers together to find the highest common link mode.
#define	GRETH_MII_LPA_10_HD (1u << 5)
	10BASE-T Half Duplex

#define	GRETH_MII_LPA_10_FD (1u << 6)
	10BASE-T Full Duplex

#define	GRETH_MII_LPA_100_HD (1u << 7)
	100BASE-TX Half Duplex

#define	GRETH_MII_LPA_100_FD (1u << 8)
	100BASE-TX Full Duplex

Macro Definition Documentation

◆ GRETH_BD_EN

#define GRETH_BD_EN (1u << 11)

Enable: descriptor owned by DMA.

Definition at line 92 of file greth_regs.h.

◆ GRETH_BD_IE

#define GRETH_BD_IE (1u << 13)

Interrupt enable after processing.

Definition at line 94 of file greth_regs.h.

◆ GRETH_BD_LEN_MASK

#define GRETH_BD_LEN_MASK (0x7FFu)

bits[10:0]: frame byte length

Definition at line 91 of file greth_regs.h.

◆ GRETH_BD_WR

#define GRETH_BD_WR (1u << 12)

Wrap: last descriptor, next = first.

Definition at line 93 of file greth_regs.h.

◆ GRETH_CTRL_EDCL_CAP

#define GRETH_CTRL_EDCL_CAP (1u << 26)

EDCL present (read-only, bit 26 not 31)

Definition at line 55 of file greth_regs.h.

◆ GRETH_CTRL_EDCLDIS

#define GRETH_CTRL_EDCLDIS (1u << 14)

EDCL disable.

Definition at line 53 of file greth_regs.h.

◆ GRETH_CTRL_FD

#define GRETH_CTRL_FD (1u << 4)

Full duplex mode.

Definition at line 48 of file greth_regs.h.

◆ GRETH_CTRL_GB

#define GRETH_CTRL_GB (1u << 8)

Gigabit mode (1000 Mbps)

Definition at line 52 of file greth_regs.h.

◆ GRETH_CTRL_GBIT_CAP

#define GRETH_CTRL_GBIT_CAP (1u << 27)

Gigabit capable (read-only)

Definition at line 54 of file greth_regs.h.

◆ GRETH_CTRL_PRO

#define GRETH_CTRL_PRO (1u << 5)

Promiscuous mode.

Definition at line 49 of file greth_regs.h.

◆ GRETH_CTRL_RST

#define GRETH_CTRL_RST (1u << 6)

Software reset (self-clearing)

Definition at line 50 of file greth_regs.h.

◆ GRETH_CTRL_RXEN

#define GRETH_CTRL_RXEN (1u << 1)

RX enable: start/continue DMA RX.

Definition at line 45 of file greth_regs.h.

◆ GRETH_CTRL_RXIRQEN

#define GRETH_CTRL_RXIRQEN (1u << 3)

RX interrupt enable.

Definition at line 47 of file greth_regs.h.

◆ GRETH_CTRL_SPD

#define GRETH_CTRL_SPD (1u << 7)

Speed: 1=100 Mbps, 0=10 Mbps.

Definition at line 51 of file greth_regs.h.

◆ GRETH_CTRL_TXEN

#define GRETH_CTRL_TXEN (1u << 0)

TX enable: start/continue DMA TX.

Definition at line 44 of file greth_regs.h.

◆ GRETH_CTRL_TXIRQEN

#define GRETH_CTRL_TXIRQEN (1u << 2)

TX interrupt enable.

Definition at line 46 of file greth_regs.h.

◆ GRETH_MDIO_BUSY

#define GRETH_MDIO_BUSY (1u << 3)

Transaction in progress.

Definition at line 77 of file greth_regs.h.

◆ GRETH_MDIO_DATASHIFT

#define GRETH_MDIO_DATASHIFT (16u)

Read/write data shift.

Definition at line 81 of file greth_regs.h.

◆ GRETH_MDIO_NVALID

#define GRETH_MDIO_NVALID (1u << 4)

Read data not valid.

Definition at line 78 of file greth_regs.h.

◆ GRETH_MDIO_OP_RD

#define GRETH_MDIO_OP_RD (2u)

Read operation.

Definition at line 76 of file greth_regs.h.

◆ GRETH_MDIO_OP_WR

#define GRETH_MDIO_OP_WR (1u)

Write operation.

Definition at line 75 of file greth_regs.h.

◆ GRETH_MDIO_PHYSHIFT

#define GRETH_MDIO_PHYSHIFT (11u)

PHY device address shift.

Definition at line 80 of file greth_regs.h.

◆ GRETH_MDIO_REGSHIFT

#define GRETH_MDIO_REGSHIFT (6u)

PHY register address shift.

Definition at line 79 of file greth_regs.h.

◆ GRETH_MII_ADV

#define GRETH_MII_ADV (4)

Auto-Negotiation Advertisement.

Definition at line 130 of file greth_regs.h.

◆ GRETH_MII_CTRL

#define GRETH_MII_CTRL (0)

Basic Control.

Definition at line 128 of file greth_regs.h.

◆ GRETH_MII_CTRL_ANEG

#define GRETH_MII_CTRL_ANEG (1u << 12)

Auto-negotiation enable.

Definition at line 134 of file greth_regs.h.

◆ GRETH_MII_CTRL_FD

#define GRETH_MII_CTRL_FD (1u << 8)

Full duplex (if no aneg)

Definition at line 136 of file greth_regs.h.

◆ GRETH_MII_CTRL_RST

#define GRETH_MII_CTRL_RST (1u << 15)

Software reset.

Definition at line 133 of file greth_regs.h.

◆ GRETH_MII_CTRL_SPD100

#define GRETH_MII_CTRL_SPD100 (1u << 13)

100 Mbps (if no aneg)

Definition at line 135 of file greth_regs.h.

◆ GRETH_MII_LPA

#define GRETH_MII_LPA (5)

Link Partner Ability.

Definition at line 131 of file greth_regs.h.

◆ GRETH_MII_LPA_100_FD

#define GRETH_MII_LPA_100_FD (1u << 8)

100BASE-TX Full Duplex

Definition at line 152 of file greth_regs.h.

◆ GRETH_MII_LPA_100_HD

#define GRETH_MII_LPA_100_HD (1u << 7)

100BASE-TX Half Duplex

Definition at line 151 of file greth_regs.h.

◆ GRETH_MII_LPA_10_FD

#define GRETH_MII_LPA_10_FD (1u << 6)

10BASE-T Full Duplex

Definition at line 150 of file greth_regs.h.

◆ GRETH_MII_LPA_10_HD

#define GRETH_MII_LPA_10_HD (1u << 5)

10BASE-T Half Duplex

Definition at line 149 of file greth_regs.h.

◆ GRETH_MII_STATUS

#define GRETH_MII_STATUS (1)

Basic Status.

Definition at line 129 of file greth_regs.h.

◆ GRETH_MII_STATUS_ANEG_DONE

#define GRETH_MII_STATUS_ANEG_DONE (1u << 5)

Auto-negotiation complete.

Definition at line 137 of file greth_regs.h.

◆ GRETH_MII_STATUS_LINK

#define GRETH_MII_STATUS_LINK (1u << 2)

Link status.

Definition at line 138 of file greth_regs.h.

◆ GRETH_RXBD_ERR_AE

#define GRETH_RXBD_ERR_AE (1u << 14)

Alignment error.

Definition at line 113 of file greth_regs.h.

◆ GRETH_RXBD_ERR_CRC

#define GRETH_RXBD_ERR_CRC (1u << 16)

CRC error.

Definition at line 115 of file greth_regs.h.

◆ GRETH_RXBD_ERR_FT

#define GRETH_RXBD_ERR_FT (1u << 15)

Frame too long.

Definition at line 114 of file greth_regs.h.

◆ GRETH_RXBD_ERR_LE

#define GRETH_RXBD_ERR_LE (1u << 18)

Length mismatch.

Definition at line 117 of file greth_regs.h.

◆ GRETH_RXBD_ERR_MASK

#define GRETH_RXBD_ERR_MASK

Value:

                              (GRETH_RXBD_ERR_AE | GRETH_RXBD_ERR_FT | \
                              GRETH_RXBD_ERR_CRC | GRETH_RXBD_ERR_OE | \
                              GRETH_RXBD_ERR_LE)

All RX descriptor error bits combined.

Definition at line 119 of file greth_regs.h.

◆ GRETH_RXBD_ERR_OE

#define GRETH_RXBD_ERR_OE (1u << 17)

FIFO overrun.

Definition at line 116 of file greth_regs.h.

◆ GRETH_STATUS_PHYIRQ

#define GRETH_STATUS_PHYIRQ (1u << 4)

PHY link status change.

Definition at line 68 of file greth_regs.h.

◆ GRETH_STATUS_RXERR

#define GRETH_STATUS_RXERR (1u << 0)

RX error occurred.

Definition at line 64 of file greth_regs.h.

◆ GRETH_STATUS_RXIRQ

#define GRETH_STATUS_RXIRQ (1u << 2)

RX frame received (DMA done)

Definition at line 66 of file greth_regs.h.

◆ GRETH_STATUS_TXERR

#define GRETH_STATUS_TXERR (1u << 1)

TX error occurred.

Definition at line 65 of file greth_regs.h.

◆ GRETH_STATUS_TXIRQ

#define GRETH_STATUS_TXIRQ (1u << 3)

TX frame sent (DMA done)

Definition at line 67 of file greth_regs.h.

◆ GRETH_TXBD_ERR_AL

#define GRETH_TXBD_ERR_AL (1u << 15)

Attempt limit exceeded.

Definition at line 102 of file greth_regs.h.

◆ GRETH_TXBD_ERR_LC

#define GRETH_TXBD_ERR_LC (1u << 16)

Late collision.

Definition at line 103 of file greth_regs.h.

◆ GRETH_TXBD_ERR_MASK

#define GRETH_TXBD_ERR_MASK

Value:

(GRETH_TXBD_ERR_UE | GRETH_TXBD_ERR_AL | \

GRETH_TXBD_ERR_LC)

GRETH_TXBD_ERR_AL

#define GRETH_TXBD_ERR_AL