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periph_conf.h
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1/*
2 * Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com>
3 * Copyright (C) 2017 Dan Evans <photonthunder@gmail.com>
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
22#ifndef PERIPH_CONF_H
23#define PERIPH_CONF_H
24
25#include <stdint.h>
26
27#include "cpu.h"
28#include "periph_cpu.h"
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
66#define CLOCK_USE_PLL (1)
67#define CLOCK_USE_XOSC32_DFLL (0)
68/*
69 * 0: use XOSC32K (always 32.768kHz) to clock GCLK2
70 * 1: use OSCULP32K factory calibrated (~32.768kHz) to clock GCLK2
71 *
72 * OSCULP32K is factory calibrated to be around 32.768kHz but this values can
73 * be of by a couple off % points, so prefer XOSC32K as default configuration.
74 */
75#define GEN2_ULP32K (0)
76
77#if CLOCK_USE_PLL
78/* edit these values to adjust the PLL output frequency */
79#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
80#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
81/* generate the actual used core clock frequency */
82#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
83#elif CLOCK_USE_XOSC32_DFLL
84/* Settings for 32 kHz external oscillator and 48 MHz DFLL */
85#define CLOCK_CORECLOCK (48000000U)
86#define CLOCK_XOSC32K (32768UL)
87#define CLOCK_8MHZ (1)
88#else
89/* edit this value to your needs */
90#define CLOCK_DIV (1U)
91/* generate the actual core clock frequency */
92#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
93#endif
100static const tc32_conf_t timer_config[] = {
101 { /* Timer 0 - System Clock */
102 .dev = TC3,
103 .irq = TC3_IRQn,
104 .pm_mask = PM_APBCMASK_TC3,
105 .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
106#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
107 .gclk_src = SAM0_GCLK_1MHZ,
108#else
109 .gclk_src = SAM0_GCLK_MAIN,
110#endif
111 .flags = TC_CTRLA_MODE_COUNT16,
112 },
113 { /* Timer 1 */
114 .dev = TC4,
115 .irq = TC4_IRQn,
116 .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
117 .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
118#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
119 .gclk_src = SAM0_GCLK_1MHZ,
120#else
121 .gclk_src = SAM0_GCLK_MAIN,
122#endif
123 .flags = TC_CTRLA_MODE_COUNT32,
124 }
125};
126
127#define TIMER_0_MAX_VALUE 0xffff
128
129/* interrupt function name mapping */
130#define TIMER_0_ISR isr_tc3
131#define TIMER_1_ISR isr_tc4
132
133#define TIMER_NUMOF ARRAY_SIZE(timer_config)
140static const uart_conf_t uart_config[] = {
141 { /* Virtual COM Port */
142 .dev = &SERCOM3->USART,
143 .rx_pin = GPIO_PIN(PA,23),
144 .tx_pin = GPIO_PIN(PA,22),
145#ifdef MODULE_PERIPH_UART_HW_FC
146 .rts_pin = GPIO_UNDEF,
147 .cts_pin = GPIO_UNDEF,
148#endif
149 .mux = GPIO_MUX_C,
150 .rx_pad = UART_PAD_RX_1,
151 .tx_pad = UART_PAD_TX_0,
152 .flags = UART_FLAG_NONE,
153 .gclk_src = SAM0_GCLK_MAIN,
154 },
155 { /* EXT1 */
156 .dev = &SERCOM4->USART,
157 .rx_pin = GPIO_PIN(PB,9),
158 .tx_pin = GPIO_PIN(PB,8),
159#ifdef MODULE_PERIPH_UART_HW_FC
160 .rts_pin = GPIO_UNDEF,
161 .cts_pin = GPIO_UNDEF,
162#endif
163 .mux = GPIO_MUX_D,
164 .rx_pad = UART_PAD_RX_1,
165 .tx_pad = UART_PAD_TX_0,
166 .flags = UART_FLAG_NONE,
167 .gclk_src = SAM0_GCLK_MAIN,
168 },
169 { /* EXT2/3 */
170 .dev = &SERCOM4->USART,
171 .rx_pin = GPIO_PIN(PB,11),
172 .tx_pin = GPIO_PIN(PB,10),
173#ifdef MODULE_PERIPH_UART_HW_FC
174 .rts_pin = GPIO_UNDEF,
175 .cts_pin = GPIO_UNDEF,
176#endif
177 .mux = GPIO_MUX_D,
178 .rx_pad = UART_PAD_RX_3,
179 .tx_pad = UART_PAD_TX_2,
180 .flags = UART_FLAG_NONE,
181 .gclk_src = SAM0_GCLK_MAIN,
182 }
183};
184
185/* interrupt function name mapping */
186#define UART_0_ISR isr_sercom3
187#define UART_1_ISR isr_sercom4
188#define UART_2_ISR isr_sercom5
189
190#define UART_NUMOF ARRAY_SIZE(uart_config)
197#define PWM_0_EN 1
198#define PWM_1_EN 0
199#define PWM_2_EN 0
200
201#if PWM_0_EN
202/* PWM0 channels */
203static const pwm_conf_chan_t pwm_chan0_config[] = {
204 /* GPIO pin, MUX value, TCC channel */
205 { .pin = GPIO_PIN(PA, 12), .mux = GPIO_MUX_E, .chan = 0 },
206 { .pin = GPIO_PIN(PA, 13), .mux = GPIO_MUX_E, .chan = 1 },
207};
208#endif
209#if PWM_1_EN
210/* PWM1 channels */
211static const pwm_conf_chan_t pwm_chan1_config[] = {
212 /* GPIO pin, MUX value, TCC channel */
213 { .pin = GPIO_PIN(PB, 12), .mux = GPIO_MUX_E, .chan = 0 },
214 { .pin = GPIO_PIN(PB, 13), .mux = GPIO_MUX_E, .chan = 1 },
215};
216#endif
217#if PWM_2_EN
218/* PWM2 channels */
219static const pwm_conf_chan_t pwm_chan2_config[] = {
220 /* GPIO pin, MUX value, TCC channel */
221 { .pin = GPIO_PIN(PB, 02), .mux = GPIO_MUX_E, .chan = 0 },
222 { .pin = GPIO_PIN(PB, 03), .mux = GPIO_MUX_E, .chan = 1 },
223};
224#endif
225
226/* PWM device configuration */
227static const pwm_conf_t pwm_config[] = {
228#if PWM_0_EN
229 {
230 .tim = TCC_CONFIG(TCC2),
231 .chan = pwm_chan0_config,
232 .chan_numof = ARRAY_SIZE(pwm_chan0_config),
233 .gclk_src = SAM0_GCLK_MAIN,
234 },
235#endif
236#if PWM_1_EN
237 {
238 .tim = TC_CONFIG(TC4),
239 .chan = pwm_chan1_config,
240 .chan_numof = ARRAY_SIZE(pwm_chan1_config),
241 .gclk_src = SAM0_GCLK_MAIN,
242 },
243#endif
244#if PWM_2_EN
245 {
246 .tim = TC_CONFIG(TC6),
247 .chan = pwm_chan2_config,
248 .chan_numof = ARRAY_SIZE(pwm_chan2_config),
249 .gclk_src = SAM0_GCLK_MAIN,
250 },
251#endif
252};
253
254/* number of devices that are actually defined */
255#define PWM_NUMOF ARRAY_SIZE(pwm_config)
262static const spi_conf_t spi_config[] = {
263 { /* EXT1 */
264 .dev = &SERCOM0->SPI,
265 .miso_pin = GPIO_PIN(PA, 4),
266 .mosi_pin = GPIO_PIN(PA, 6),
267 .clk_pin = GPIO_PIN(PA, 7),
268 .miso_mux = GPIO_MUX_D,
269 .mosi_mux = GPIO_MUX_D,
270 .clk_mux = GPIO_MUX_D,
271 .miso_pad = SPI_PAD_MISO_0,
272 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
273 .gclk_src = SAM0_GCLK_MAIN,
274#ifdef MODULE_PERIPH_DMA
275 .tx_trigger = SERCOM0_DMAC_ID_TX,
276 .rx_trigger = SERCOM0_DMAC_ID_RX,
277#endif
278 },
279 { /* EXT2 */
280 .dev = &SERCOM1->SPI,
281 .miso_pin = GPIO_PIN(PA, 16),
282 .mosi_pin = GPIO_PIN(PA, 18),
283 .clk_pin = GPIO_PIN(PA, 19),
284 .miso_mux = GPIO_MUX_C,
285 .mosi_mux = GPIO_MUX_C,
286 .clk_mux = GPIO_MUX_C,
287 .miso_pad = SPI_PAD_MISO_0,
288 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
289 .gclk_src = SAM0_GCLK_MAIN,
290#ifdef MODULE_PERIPH_DMA
291 .tx_trigger = SERCOM1_DMAC_ID_TX,
292 .rx_trigger = SERCOM1_DMAC_ID_RX,
293#endif
294 },
295 { /* EXT3 */
296 .dev = &SERCOM5->SPI,
297 .miso_pin = GPIO_PIN(PB, 16),
298 .mosi_pin = GPIO_PIN(PB, 22),
299 .clk_pin = GPIO_PIN(PB, 23),
300 .miso_mux = GPIO_MUX_C,
301 .mosi_mux = GPIO_MUX_D,
302 .clk_mux = GPIO_MUX_D,
303 .miso_pad = SPI_PAD_MISO_0,
304 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
305 .gclk_src = SAM0_GCLK_MAIN,
306#ifdef MODULE_PERIPH_DMA
307 .tx_trigger = SERCOM5_DMAC_ID_TX,
308 .rx_trigger = SERCOM5_DMAC_ID_RX,
309#endif
310 }
311};
312
313#define SPI_NUMOF ARRAY_SIZE(spi_config)
320static const i2c_conf_t i2c_config[] = {
321 {
322 .dev = &(SERCOM2->I2CM),
323 .speed = I2C_SPEED_NORMAL,
324 .scl_pin = GPIO_PIN(PA, 9),
325 .sda_pin = GPIO_PIN(PA, 8),
326 .mux = GPIO_MUX_D,
327 .gclk_src = SAM0_GCLK_MAIN,
328 .flags = I2C_FLAG_NONE
329 }
330};
331#define I2C_NUMOF ARRAY_SIZE(i2c_config)
338#ifndef RTT_FREQUENCY
339#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
340#endif
348/* ADC Default values */
349#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
350
351#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
352#define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
353#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
354
355static const adc_conf_chan_t adc_channels[] = {
356 /* port, pin, muxpos */
357 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB00 }, /* EXT1, pin 3 */
358 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB01 }, /* EXT1, pin 4 */
359 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA10 }, /* EXT2, pin 3 */
360 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA11 }, /* EXT2, pin 4 */
361 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* EXT3, pin 3 */
362 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA03 } /* EXT3, pin 4. This is
363 disconnected by default. PA3 is connected to USB_ID.
364 Move PA03 SELECT jumper to EXT3 to connect. */
365};
366
367#define ADC_NUMOF ARRAY_SIZE(adc_channels)
374#define DAC_CLOCK SAM0_GCLK_1MHZ
375 /* use Vcc as reference voltage */
376#define DAC_VREF DAC_CTRLB_REFSEL_AVCC
383static const sam0_common_usb_config_t sam_usbdev_config[] = {
384 {
385 .dm = GPIO_PIN(PA, 24),
386 .dp = GPIO_PIN(PA, 25),
387 .d_mux = GPIO_MUX_G,
388 .device = &USB->DEVICE,
389 .gclk_src = SAM0_GCLK_MAIN,
390 }
391};
393#ifdef __cplusplus
394}
395#endif
396
397#endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition container.h:83
@ UART_PAD_RX_1
select pad 1
@ UART_PAD_RX_3
select pad 3
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
#define TC_CONFIG(tim)
Static initializer for TC timer configuration.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0
select pad 0
@ UART_PAD_TX_2
select pad 2
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition periph_cpu.h:76
#define ADC_INPUTCTRL_MUXPOS_PA10
Alias for PIN18.
Definition periph_cpu.h:137
#define ADC_INPUTCTRL_MUXPOS_PA11
Alias for PIN19.
Definition periph_cpu.h:138
#define ADC_INPUTCTRL_MUXPOS_PB01
Alias for PIN9.
Definition periph_cpu.h:128
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition periph_cpu.h:119
#define ADC_INPUTCTRL_MUXPOS_PA03
Alias for PIN1.
Definition periph_cpu.h:120
#define ADC_INPUTCTRL_MUXPOS_PB00
Alias for PIN8.
Definition periph_cpu.h:127
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:74
ADC Channel Configuration.
uint32_t inputctrl
ADC channel pin multiplexer value
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
PWM channel configuration data structure.
gpio_t pin
GPIO pin.
uint8_t chan
TCC channel to use.
PWM device configuration.
tc_tcc_cfg_t tim
timer configuration
USB peripheral parameters.
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
Timer device configuration.
Tc * dev
pointer to the used Timer device
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219