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periph_conf.h
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1/*
2 * Copyright (C) 2020 ML!PA Consulting GmbH
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
20#ifndef PERIPH_CONF_H
21#define PERIPH_CONF_H
22
23#include <stdint.h>
24
25#include "cpu.h"
26#include "periph_cpu.h"
27
28#ifdef __cplusplus
29extern "C" {
30#endif
31
64#define CLOCK_USE_PLL (1)
65#define CLOCK_USE_XOSC32_DFLL (0)
66/*
67 * 0: use XOSC32K (always 32.768kHz) to clock GCLK2
68 * 1: use OSCULP32K factory calibrated (~32.768kHz) to clock GCLK2
69 *
70 * OSCULP32K is factory calibrated to be around 32.768kHz but this values can
71 * be of by a couple off % points, so prefer XOSC32K as default configuration.
72 */
73#define GEN2_ULP32K (1)
74
75#if CLOCK_USE_PLL
76/* edit these values to adjust the PLL output frequency */
77#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
78#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
79/* generate the actual used core clock frequency */
80#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
81#elif CLOCK_USE_XOSC32_DFLL
82/* Settings for 32 kHz external oscillator and 48 MHz DFLL */
83#define CLOCK_CORECLOCK (48000000U)
84#define CLOCK_XOSC32K (32768UL)
85#define CLOCK_8MHZ (1)
86#else
87/* edit this value to your needs */
88#define CLOCK_DIV (1U)
89/* generate the actual core clock frequency */
90#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
91#endif
98static const tc32_conf_t timer_config[] = {
99 { /* Timer 0 - System Clock */
100 .dev = TC1,
101 .irq = TC1_IRQn,
102 .pm_mask = PM_APBCMASK_TC1 | PM_APBCMASK_TC2,
103 .gclk_ctrl = GCLK_CLKCTRL_ID_TC1_TC2,
104#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
105 .gclk_src = SAM0_GCLK_1MHZ,
106#else
107 .gclk_src = SAM0_GCLK_MAIN,
108#endif
109 .flags = TC_CTRLA_MODE_COUNT32,
110 },
111};
112
113#define TIMER_0_MAX_VALUE 0xffffffff
114
115/* interrupt function name mapping */
116#define TIMER_0_ISR isr_tc1
117
118#define TIMER_NUMOF ARRAY_SIZE(timer_config)
125static const uart_conf_t uart_config[] = {
126 { /* Virtual COM Port */
127 .dev = &SERCOM0->USART,
128 .rx_pin = GPIO_PIN(PA, 11),
129 .tx_pin = GPIO_PIN(PA, 10),
130#ifdef MODULE_PERIPH_UART_HW_FC
131 .rts_pin = GPIO_UNDEF,
132 .cts_pin = GPIO_UNDEF,
133#endif
134 .mux = GPIO_MUX_C,
135 .rx_pad = UART_PAD_RX_3,
136 .tx_pad = UART_PAD_TX_2,
137 .flags = UART_FLAG_NONE,
138 .gclk_src = SAM0_GCLK_MAIN,
139 },
140};
141
142/* interrupt function name mapping */
143#define UART_0_ISR isr_sercom0
144
145#define UART_NUMOF ARRAY_SIZE(uart_config)
152#define PWM_0_EN 1
153
154#if PWM_0_EN
155/* PWM0 channels */
156static const pwm_conf_chan_t pwm_chan0_config[] = {
157 /* GPIO pin, MUX value, TCC channel */
158 { GPIO_PIN(PA, 17), GPIO_MUX_F, 7 },
159 { GPIO_PIN(PA, 22), GPIO_MUX_F, 4 },
160 { GPIO_PIN(PA, 23), GPIO_MUX_F, 5 },
161 { GPIO_PIN(PA, 24), GPIO_MUX_E, 2 },
162};
163#endif
164
165/* PWM device configuration */
166static const pwm_conf_t pwm_config[] = {
167#if PWM_0_EN
168 {TCC_CONFIG(TCC0), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
169#endif
170};
171
172/* number of devices that are actually defined */
173#define PWM_NUMOF ARRAY_SIZE(pwm_config)
180static const spi_conf_t spi_config[] = {
181 { /* SPI header */
182 .dev = &SERCOM1->SPI,
183 .miso_pin = GPIO_PIN(PA, 24),
184 .mosi_pin = GPIO_PIN(PA, 22),
185 .clk_pin = GPIO_PIN(PA, 9),
186 .miso_mux = GPIO_MUX_C,
187 .mosi_mux = GPIO_MUX_C,
188 .clk_mux = GPIO_MUX_C,
189 .miso_pad = SPI_PAD_MISO_2,
190 .mosi_pad = SPI_PAD_MOSI_0_SCK_3,
191 .gclk_src = SAM0_GCLK_MAIN,
192 },
193};
194
195#define SPI_NUMOF ARRAY_SIZE(spi_config)
202static const i2c_conf_t i2c_config[] = {
203 {
204 .dev = &(SERCOM2->I2CM),
205 .speed = I2C_SPEED_NORMAL,
206 .scl_pin = GPIO_PIN(PA, 15),
207 .sda_pin = GPIO_PIN(PA, 14),
208 .mux = GPIO_MUX_D,
209 .gclk_src = SAM0_GCLK_MAIN,
210 .flags = I2C_FLAG_NONE
211 }
212};
213#define I2C_NUMOF ARRAY_SIZE(i2c_config)
220#ifndef RTT_FREQUENCY
221#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
222#endif
230/* ADC Default values */
231#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
232
233#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
234#define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
235#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
236
237static const adc_conf_chan_t adc_channels[] = {
238 /* port, pin, muxpos */
240 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA03 },
241 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 },
242 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 },
243 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 },
244 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 },
245};
246
247#define ADC_NUMOF ARRAY_SIZE(adc_channels)
254#define DAC_CLOCK SAM0_GCLK_1MHZ
255 /* use Vcc as reference voltage */
256#define DAC_VREF DAC_CTRLB_REFSEL_AVCC
259#ifdef __cplusplus
260}
261#endif
262
263#endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition container.h:83
@ UART_PAD_RX_3
select pad 3
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_2
use pad 2 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_2
select pad 2
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_0_SCK_3
use pad 0 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition periph_cpu.h:124
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition periph_cpu.h:76
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition periph_cpu.h:126
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition periph_cpu.h:123
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition periph_cpu.h:119
#define ADC_INPUTCTRL_MUXPOS_PA03
Alias for PIN1.
Definition periph_cpu.h:120
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:74
ADC Channel Configuration.
uint32_t inputctrl
ADC channel pin multiplexer value
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
PWM channel configuration data structure.
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
Timer device configuration.
Tc * dev
pointer to the used Timer device
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219