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periph_conf.h File Reference

Peripheral MCU configuration for the P-L496G-CELL02 board. More...

Detailed Description

Peripheral MCU configuration for the P-L496G-CELL02 board.

Author
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
#include "cfg_usb_otg_fs.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

#define CONFIG_BOARD_HAS_LSE   1
 

UART configuration

#define UART_0_ISR   (isr_usart2)
 
#define UART_1_ISR   (isr_lpuart1)
 
#define UART_2_ISR   (isr_usart1)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

I2C configuration

#define I2C_0_ISR   isr_i2c1_er
 
#define I2C_NUMOF   ARRAY_SIZE(i2c_config)
 
static const i2c_conf_t i2c_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

Macro Definition Documentation

◆ CONFIG_BOARD_HAS_LSE

#define CONFIG_BOARD_HAS_LSE   1

Definition at line 24 of file periph_conf.h.

◆ I2C_0_ISR

#define I2C_0_ISR   isr_i2c1_er

Definition at line 124 of file periph_conf.h.

◆ I2C_NUMOF

#define I2C_NUMOF   ARRAY_SIZE(i2c_config)

Definition at line 126 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 149 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR   (isr_usart2)

Definition at line 98 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR   (isr_lpuart1)

Definition at line 99 of file periph_conf.h.

◆ UART_2_ISR

#define UART_2_ISR   (isr_usart1)

Definition at line 100 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 102 of file periph_conf.h.

Variable Documentation

◆ i2c_config

const i2c_conf_t i2c_config[]
static
Initial value:
= {
{
.dev = I2C1,
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PORT_B, 8),
.sda_pin = GPIO_PIN(PORT_B, 7),
.scl_af = GPIO_AF4,
.sda_af = GPIO_AF4,
.bus = APB1,
.rcc_mask = RCC_APB1ENR1_I2C1EN,
.rcc_sw_mask = RCC_CCIPR_I2C1SEL_1,
.irqn = I2C1_ER_IRQn
},
}
@ PORT_B
port B
Definition periph_cpu.h:48
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:106
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79

Definition at line 109 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}
}
@ PORT_A
port A
Definition periph_cpu.h:47
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:363
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80

Definition at line 133 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static

Definition at line 41 of file periph_conf.h.