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periph_conf.h
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1/*
2 * Copyright (C) 2020 Inria
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
19#ifndef PERIPH_CONF_H
20#define PERIPH_CONF_H
21
22/* Add specific clock configuration (HSE, LSE) for this board here */
23#ifndef CONFIG_BOARD_HAS_LSE
24#define CONFIG_BOARD_HAS_LSE 1
25#endif
26
27#include "periph_cpu.h"
28#include "clk_conf.h"
29#include "cfg_i2c1_pb8_pb9.h"
30#include "cfg_rtt_default.h"
31#include "cfg_timer_tim5.h"
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36
41static const uart_conf_t uart_config[] = {
42 {
43 .dev = LPUART1,
44 .rcc_mask = RCC_APB1ENR2_LPUART1EN,
45 .rx_pin = GPIO_PIN(PORT_G, 8),
46 .tx_pin = GPIO_PIN(PORT_G, 7),
47 .rx_af = GPIO_AF8,
48 .tx_af = GPIO_AF8,
49 .bus = APB12,
50 .irqn = LPUART1_IRQn,
51 .type = STM32_LPUART,
52 .clk_src = 0, /* Use APB clock */
53 },
54 { /* Connected to Arduino D0/D1 */
55 .dev = USART3,
56 .rcc_mask = RCC_APB1ENR1_USART3EN,
57 .rx_pin = GPIO_PIN(PORT_D, 9),
58 .tx_pin = GPIO_PIN(PORT_D, 8),
59 .rx_af = GPIO_AF7,
60 .tx_af = GPIO_AF7,
61 .bus = APB1,
62 .irqn = USART3_IRQn,
63 .type = STM32_USART,
64 .clk_src = 0, /* Use APB clock */
65 },
66};
67
68#define UART_0_ISR (isr_lpuart1)
69#define UART_1_ISR (isr_usart3)
70
71#define UART_NUMOF ARRAY_SIZE(uart_config)
78static const spi_conf_t spi_config[] = {
79 {
80 .dev = SPI1,
81 .mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
82 .miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
83 .sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
84 .cs_pin = GPIO_UNDEF,
85 .mosi_af = GPIO_AF5,
86 .miso_af = GPIO_AF5,
87 .sclk_af = GPIO_AF5,
88 .cs_af = GPIO_AF5,
89 .rccmask = RCC_APB2ENR_SPI1EN,
90 .apbbus = APB2,
91 },
92};
93
94#define SPI_NUMOF ARRAY_SIZE(spi_config)
113static const pwm_conf_t pwm_config[] = {
114 {
115 .dev = TIM2,
116 .rcc_mask = RCC_APB1ENR1_TIM2EN,
117 .chan = { { .pin = GPIO_PIN(PORT_A, 0) /* CN10 D32 */, .cc_chan = 0},
118 { .pin = GPIO_PIN(PORT_A, 1) /* CN10 A8 */, .cc_chan = 1},
119 { .pin = GPIO_PIN(PORT_A, 2) /* CN9 A1 */, .cc_chan = 2},
120 { .pin = GPIO_PIN(PORT_A, 3) /* CN9 A0 */, .cc_chan = 3} },
121 .af = GPIO_AF1,
122 .bus = APB1
123 },
124 {
125 .dev = TIM3,
126 .rcc_mask = RCC_APB1ENR1_TIM3EN,
127 .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* CN7 D25 */, .cc_chan = 0},
128 { .pin = GPIO_PIN(PORT_B, 5) /* CN7 D22 */, .cc_chan = 1},
129 { .pin = GPIO_PIN(PORT_B, 0) /* CN9 A3 */, .cc_chan = 2},
130 { .pin = GPIO_PIN(PORT_B, 1) /* CN10 A6 */, .cc_chan = 3} },
131 .af = GPIO_AF2,
132 .bus = APB1
133 },
134 {
135 .dev = TIM4,
136 .rcc_mask = RCC_APB1ENR1_TIM4EN,
137 .chan = { { .pin = GPIO_PIN(PORT_D, 12) /* CN7 D19 */, .cc_chan = 0},
138 { .pin = GPIO_PIN(PORT_B, 7) /* Blue LD2 */, .cc_chan = 1},
139 { .pin = GPIO_PIN(PORT_D, 14) /* CN7 D10 */, .cc_chan = 2},
140 { .pin = GPIO_PIN(PORT_D, 15) /* CN7 D9 */, .cc_chan = 3} },
141 .af = GPIO_AF2,
142 .bus = APB1
143 },
144};
145
146#define PWM_NUMOF ARRAY_SIZE(pwm_config)
147
150#ifdef __cplusplus
151}
152#endif
153
154#endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_G
port G
Definition periph_cpu.h:53
@ PORT_A
port A
Definition periph_cpu.h:47
@ PORT_D
port D
Definition periph_cpu.h:50
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:103
@ GPIO_AF2
use alternate function 2
Definition cpu_gpio.h:104
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
@ GPIO_AF8
use alternate function 8
Definition cpu_gpio.h:111
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:109
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition cpu_uart.h:39
@ STM32_USART
STM32 USART module type.
Definition cpu_uart.h:38
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219