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periph_conf.h File Reference

Peripheral MCU configuration for the nucleo-l412kb board. More...

Detailed Description

Peripheral MCU configuration for the nucleo-l412kb board.

Author
Marius mariu.nosp@m.s@tw.nosp@m.ostai.nosp@m.rs.c.nosp@m.om
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr
Vincent Dupont vince.nosp@m.nt@o.nosp@m.takey.nosp@m.s.co.nosp@m.m

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb6_pb7.h"
#include "cfg_timer_tim2.h"
#include "cfg_rtt_default.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

#define CONFIG_BOARD_HAS_LSE   1
 

UART configuration

#define UART_0_ISR   (isr_usart2)
 
#define UART_1_ISR   (isr_usart1)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

Macro Definition Documentation

◆ CONFIG_BOARD_HAS_LSE

#define CONFIG_BOARD_HAS_LSE   1

Definition at line 28 of file periph_conf.h.

◆ PWM_NUMOF

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)

Definition at line 95 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 118 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR   (isr_usart2)

Definition at line 72 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR   (isr_usart1)

Definition at line 73 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 75 of file periph_conf.h.

Variable Documentation

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.chan = { { .pin = GPIO_PIN(PORT_A, 8) , .cc_chan = 0 },
{ .pin = GPIO_UNDEF, .cc_chan = 0 },
{ .pin = GPIO_UNDEF, .cc_chan = 0 },
{ .pin = GPIO_UNDEF, .cc_chan = 0 } },
.af = GPIO_AF1,
.bus = APB2
}
}
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:103
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80

Definition at line 82 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_B, 5),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = SPI_CS_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}
}
@ PORT_B
port B
Definition periph_cpu.h:48
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:363

Definition at line 102 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR1_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 15),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF3,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn,
.type = STM32_USART,
.clk_src = 0,
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn,
.type = STM32_USART,
.clk_src = 0,
},
}
@ GPIO_AF3
use alternate function 3
Definition cpu_gpio.h:105
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:109
@ STM32_USART
STM32 USART module type.
Definition cpu_uart.h:38
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79

Definition at line 45 of file periph_conf.h.