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periph_conf.h
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1/*
2 * Copyright (C) 2019 Inria
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
19#ifndef PERIPH_CONF_H
20#define PERIPH_CONF_H
21
22/*
23 * This board provides an LSE, so enable it before including the default clock config
24 */
25#ifndef CONFIG_BOARD_HAS_LSE
26#define CONFIG_BOARD_HAS_LSE 1
27#endif
28
32#ifndef CONFIG_BOARD_HAS_HSE
33#define CONFIG_BOARD_HAS_HSE 1
34#endif
35
39#ifndef CONFIG_CLOCK_HSE
40#define CONFIG_CLOCK_HSE MHZ(16)
41#endif
42
43#include "periph_cpu.h"
44#include "clk_conf.h"
45
46#ifdef __cplusplus
47extern "C" {
48#endif
49
54static const timer_conf_t timer_config[] = {
55 {
56 .dev = TIM3,
57 .max = 0x0000ffff,
58 .rcc_mask = RCC_APB1ENR_TIM3EN,
59 .bus = APB1,
60 .irqn = TIM3_IRQn
61 }
62};
63
64#define TIMER_0_ISR (isr_tim3)
65
66#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
73static const uart_conf_t uart_config[] = {
74 {
75 .dev = USART1,
76 .rcc_mask = RCC_APB2ENR_USART1EN,
77 .rx_pin = GPIO_PIN(PORT_A, 10),
78 .tx_pin = GPIO_PIN(PORT_A, 9),
79 .rx_af = GPIO_AF7,
80 .tx_af = GPIO_AF7,
81 .bus = APB2,
82 .irqn = USART1_IRQn
83 },
84};
85
86#define UART_0_ISR (isr_usart1)
87
88#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
95static const spi_conf_t spi_config[] = {
96 {
97 .dev = SPI1,
98 .mosi_pin = GPIO_PIN(PORT_A, 7),
99 .miso_pin = GPIO_PIN(PORT_A, 6),
100 .sclk_pin = GPIO_PIN(PORT_A, 5),
101 .cs_pin = SPI_CS_UNDEF,
102 .mosi_af = GPIO_AF5,
103 .miso_af = GPIO_AF5,
104 .sclk_af = GPIO_AF5,
105 .cs_af = GPIO_AF5,
106 .rccmask = RCC_APB2ENR_SPI1EN,
107 .apbbus = APB2
108 },
109 {
110 .dev = SPI2,
111 .mosi_pin = GPIO_PIN(PORT_B, 14),
112 .miso_pin = GPIO_PIN(PORT_B, 15),
113 .sclk_pin = GPIO_PIN(PORT_B, 13),
114 .cs_pin = GPIO_PIN(PORT_B, 12),
115 .mosi_af = GPIO_AF5,
116 .miso_af = GPIO_AF5,
117 .sclk_af = GPIO_AF5,
118 .cs_af = GPIO_AF5,
119 .rccmask = RCC_APB1ENR_SPI2EN,
120 .apbbus = APB1
121 }
122};
123
124#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
131static const i2c_conf_t i2c_config[] = {
132 {
133 .dev = I2C1,
134 .speed = I2C_SPEED_NORMAL,
135 .scl_pin = GPIO_PIN(PORT_B, 8),
136 .sda_pin = GPIO_PIN(PORT_B, 9),
137 .scl_af = GPIO_AF4,
138 .sda_af = GPIO_AF4,
139 .bus = APB1,
140 .rcc_mask = RCC_APB1ENR_I2C1EN,
141 .clk = CLOCK_APB1,
142 .irqn = I2C1_EV_IRQn
143 }
144};
145
146#define I2C_0_ISR isr_i2c1_ev
147
148#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
155static const adc_conf_t adc_config[] = {
156 { GPIO_PIN(PORT_A, 0), 0 }, /* P14 */
157 { GPIO_PIN(PORT_A, 1), 1 }, /* P15 */
158 { GPIO_PIN(PORT_A, 3), 3 }, /* P17 */
159 /* ADC Temperature channel */
160 { GPIO_UNDEF, 16 },
161 /* ADC VREF channel */
162 { GPIO_UNDEF, 17 },
163};
164
165#define ADC_NUMOF ARRAY_SIZE(adc_config)
168#ifdef __cplusplus
169}
170#endif
171
172#endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:106
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:109
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:363
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80
ADC device configuration.
Definition periph_cpu.h:379
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
Timer device configuration.
Definition periph_cpu.h:264
TC0_t * dev
Pointer to the used as Timer device.
Definition periph_cpu.h:265
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219