Peripheral MCU configuration for the ST I-NUCLEO-LRWAN1 board.
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Peripheral MCU configuration for the ST I-NUCLEO-LRWAN1 board.
- Author
- Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr
Definition in file periph_conf.h.
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
Go to the source code of this file.
◆ CONFIG_BOARD_HAS_LSE
#define CONFIG_BOARD_HAS_LSE 1 |
◆ I2C_0_ISR
◆ I2C_NUMOF
◆ SPI_NUMOF
◆ UART_0_ISR
#define UART_0_ISR (isr_rng_lpuart1) |
◆ UART_NUMOF
◆ i2c_config
Initial value:= {
{
.dev = I2C1,
.rcc_mask = RCC_APB1ENR_I2C1EN,
.irqn = I2C1_IRQn
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
@ GPIO_AF1
use alternate function 1
@ APB1
Advanced Peripheral Bus 1
Definition at line 87 of file periph_conf.h.
◆ spi_config
Initial value:= {
{
.dev = SPI1,
.rccmask = RCC_APB2ENR_SPI1EN,
},
}
@ GPIO_AF0
use alternate function 0
@ APB2
Advanced Peripheral Bus 2
Definition at line 64 of file periph_conf.h.
◆ uart_config
Initial value:= {
{
.dev = LPUART1,
.rcc_mask = RCC_APB1ENR_LPUART1EN,
.irqn = LPUART1_IRQn,
.clk_src = 0,
},
}
@ GPIO_AF4
use alternate function 4
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition at line 40 of file periph_conf.h.