22#include "periph_cpu.h"
33static const clock_config_t clock_config = {
41 .clkdiv1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV4(0),
43 .rtc_clc = RTC_CR_SC8P_MASK | RTC_CR_SC4P_MASK,
45 .osc32ksel = SIM_SOPT1_OSC32KSEL(0),
47 KINETIS_CLOCK_RTCOSC_EN |
48 KINETIS_CLOCK_USE_FAST_IRC |
49 KINETIS_CLOCK_MCGIRCLK_EN |
50 KINETIS_CLOCK_MCGIRCLK_STOP_EN |
53 .default_mode = KINETIS_MCG_MODE_LIRC8M,
55 .erc_range = KINETIS_MCG_ERC_RANGE_LOW,
57 .fcrdiv = MCG_SC_FCRDIV(0),
58 .lirc_div2 = MCG_MC_LIRC_DIV2(0),
60#define CLOCK_CORECLOCK ( 8000000ul)
61#define CLOCK_MCGIRCLK ( 8000000ul)
62#define CLOCK_BUSCLOCK (CLOCK_CORECLOCK / 1)
76#define LPTMR_NUMOF (1U)
77#define LPTMR_CONFIG { \
80 .irqn = LPTMR0_IRQn, \
82 .base_freq = 32768u, \
85#define TIMER_NUMOF ((PIT_NUMOF) + (LPTMR_NUMOF))
87#define PIT_BASECLOCK (CLOCK_BUSCLOCK)
88#define PIT_ISR_0 isr_pit1
89#define LPTMR_ISR_0 isr_lptmr0
99 .freq = CLOCK_MCGIRCLK,
102 .pcr_rx = PORT_PCR_MUX(2),
103 .pcr_tx = PORT_PCR_MUX(2),
104 .irqn = LPUART0_IRQn,
105 .scgc_addr = &SIM->SCGC5,
106 .scgc_bit = SIM_SCGC5_LPUART0_SHIFT,
111#define UART_NUMOF ARRAY_SIZE(uart_config)
112#define LPUART_0_ISR isr_lpuart0
114#define LPUART_0_SRC 3
131#define ADC_NUMOF ARRAY_SIZE(adc_config)
138#define ADC_REF_SETTING 0
153 .scl_pcr = (PORT_PCR_MUX(5)),
154 .sda_pcr = (PORT_PCR_MUX(5)),
163 .scl_pcr = (PORT_PCR_MUX(6)),
164 .sda_pcr = (PORT_PCR_MUX(6)),
167#define I2C_NUMOF ARRAY_SIZE(i2c_config)
168#define I2C_0_ISR isr_i2c0
169#define I2C_1_ISR isr_i2c1
#define CLOCK_CORECLOCK
Clock configuration.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
@ KINETIS_LPUART
Kinetis Low-power UART (LPUART) module type.
@ UART_MODE_8N1
8 data bits, no parity, 1 stop bit
#define ADC_AVG_MAX
Maximum hardware averaging (32 samples)
ADC device configuration.
ADC_TypeDef * dev
ADC device used.
I2C configuration structure.
I2C_Type * i2c
Pointer to hardware module registers.
UART device configuration.
USART_t * dev
pointer to the used UART device