Peripheral MCU configuration for the ATxmegaA1 Xplained board.
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Peripheral MCU configuration for the ATxmegaA1 Xplained board.
- Author
- Gerson Fernando Budke nando.nosp@m.jve@.nosp@m.gmail.nosp@m..com
Definition in file periph_conf.h.
#include "mutex.h"
#include <stdint.h>
#include <avr/io.h>
#include "periph_cpu.h"
#include "periph_conf_common.h"
Go to the source code of this file.
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For more information, see ebi_conf_t structure.
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static const ebi_conf_t | ebi_config |
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◆ I2C_0_ISR
#define I2C_0_ISR TWIF_TWIM_vect |
◆ I2C_1_ISR
#define I2C_1_ISR TWIC_TWIM_vect |
◆ I2C_NUMOF
◆ SPI_NUMOF
◆ TIMER_0_ISRA
#define TIMER_0_ISRA TCC1_CCA_vect |
◆ TIMER_1_ISRA
#define TIMER_1_ISRA TCC0_CCA_vect |
◆ TIMER_1_ISRB
#define TIMER_1_ISRB TCC0_CCB_vect |
◆ TIMER_1_ISRC
#define TIMER_1_ISRC TCC0_CCC_vect |
◆ TIMER_1_ISRD
#define TIMER_1_ISRD TCC0_CCD_vect |
◆ TIMER_NUMOF
◆ UART_0_DRE_ISR
#define UART_0_DRE_ISR USARTF0_DRE_vect /* Data Register Empty Interrupt */ |
◆ UART_0_RXC_ISR
#define UART_0_RXC_ISR USARTF0_RXC_vect /* Reception Complete Interrupt */ |
◆ UART_0_TXC_ISR
#define UART_0_TXC_ISR USARTF0_TXC_vect /* Transmission Complete Interrupt */ |
◆ UART_1_DRE_ISR
#define UART_1_DRE_ISR USARTD0_DRE_vect |
◆ UART_1_RXC_ISR
#define UART_1_RXC_ISR USARTD0_RXC_vect |
◆ UART_1_TXC_ISR
#define UART_1_TXC_ISR USARTD0_TXC_vect |
◆ UART_2_DRE_ISR
#define UART_2_DRE_ISR USARTC0_DRE_vect |
◆ UART_2_RXC_ISR
#define UART_2_RXC_ISR USARTC0_RXC_vect |
◆ UART_2_TXC_ISR
#define UART_2_TXC_ISR USARTC0_TXC_vect |
◆ UART_NUMOF
◆ ebi_config
const ebi_conf_t ebi_config |
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static |
◆ i2c_config
Initial value:= {
{
.dev = &TWIF,
},
{
.dev = &TWIC,
},
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
#define PWR_RED_REG(reg, dev)
Define a CPU specific Power Reduction index macro.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
@ CPU_INT_LVL_LOW
Interrupt Low Level
Definition at line 133 of file periph_conf.h.
◆ spi_config
Initial value:= {
{
.dev = &SPIF,
},
{
.dev = &SPIC,
},
}
Definition at line 162 of file periph_conf.h.
◆ timer_config
Initial value:= {
{
.dev = (void *)&TCC1,
.type = TC_TYPE_1,
},
{
.dev = (void *)&TCC0,
.type = TC_TYPE_0,
}
}
@ CPU_INT_LVL_OFF
Interrupt Disabled
Definition at line 36 of file periph_conf.h.
◆ uart_config