Loading...
Searching...
No Matches
periph_cpu.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2017 Freie Universität Berlin
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
20#ifndef PERIPH_L4_PERIPH_CPU_H
21#define PERIPH_L4_PERIPH_CPU_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
30#if defined(ADC3)
31#define ADC_DEVS (3U)
32#elif defined(ADC2)
33#define ADC_DEVS (2U)
34#elif defined(ADC1)
35#define ADC_DEVS (1U)
36#else
37#error "Can't determine the number of ADC devices"
38#endif
39
40#if defined(CPU_MODEL_STM32L476RG) || defined(CPU_MODEL_STM32L476VG) || \
41 defined(CPU_MODEL_STM32L475VG) || defined(CPU_MODEL_STM32L452RE) || \
42 defined(CPU_MODEL_STM32L432KC) || defined(CPU_MODEL_STM32L496ZG) || \
43 defined(CPU_MODEL_STM32L4R5ZI) || defined(CPU_MODEL_STM32L496AG)
47#define ADC_T_ADCVREG_STUP_US (20)
48#endif
49
50#ifndef DOXYGEN
51
56#define STM32_BOOTLOADER_ADDR (0x1FFF0000)
57
62#define HAVE_ADC_RES_T
63typedef enum {
64 ADC_RES_6BIT = (ADC_CFGR_RES),
65 ADC_RES_8BIT = (ADC_CFGR_RES_1),
66 ADC_RES_10BIT = (ADC_CFGR_RES_0),
67 ADC_RES_12BIT = (0x0),
68 ADC_RES_14BIT = (0x1),
69 ADC_RES_16BIT = (0x2)
70} adc_res_t;
77#define VBAT_ADC_RES ADC_RES_12BIT
78#define VBAT_ADC_MAX 4095
81#endif /* ndef DOXYGEN */
82
83#ifdef __cplusplus
84}
85#endif
86
87#endif /* PERIPH_L4_PERIPH_CPU_H */
adc_res_t
Possible ADC resolution settings.
Definition adc.h:93
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition adc.h:99
@ ADC_RES_8BIT
ADC resolution: 8 bit.
Definition adc.h:95
@ ADC_RES_14BIT
ADC resolution: 14 bit.
Definition adc.h:98
@ ADC_RES_6BIT
ADC resolution: 6 bit.
Definition adc.h:94
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition adc.h:96
@ ADC_RES_12BIT
ADC resolution: 12 bit.
Definition adc.h:97