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periph_cpu.h
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/*
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* Copyright (C) 2015-2017 Freie Universität Berlin
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* 2017 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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#ifndef PERIPH_L0_PERIPH_CPU_H
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#define PERIPH_L0_PERIPH_CPU_H
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#ifndef DOXYGEN
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#define STM32_BOOTLOADER_ADDR (0x1FF00000)
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#define HAVE_ADC_RES_T
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typedef
enum
{
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ADC_RES_6BIT
= (0x3 << 3),
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ADC_RES_8BIT
= (0x2 << 3),
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ADC_RES_10BIT
= (0x1 << 3),
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ADC_RES_12BIT
= (0x0 << 3),
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ADC_RES_14BIT
= (0xfe),
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ADC_RES_16BIT
= (0xff)
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}
adc_res_t
;
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#endif
/* ndef DOXYGEN */
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#define EEPROM_START_ADDR (0x08080000)
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#if defined(CPU_LINE_STM32L073xx) || defined(CPU_LINE_STM32L072xx)
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#define EEPROM_SIZE (6144U)
/* 6kB */
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#elif defined(CPU_LINE_STM32L053xx) || defined(CPU_LINE_STM32L052xx)
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#define EEPROM_SIZE (2048U)
/* 2kB */
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#elif defined(CPU_LINE_STM32L031xx)
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#define EEPROM_SIZE (1024U)
/* 1kB */
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#elif defined(CPU_LINE_STM32L010xB) || defined(CPU_LINE_STM32L011x3) || \
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defined(CPU_LINE_STM32L011x4) || defined(CPU_LINE_STM32L021x4) || \
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defined(CPU_MODEL_STM32L011K4)
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#define EEPROM_SIZE (512U)
/* 512B */
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#elif defined(CPU_LINE_STM32L010x6) || defined(CPU_LINE_STM32L010x8)
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#define EEPROM_SIZE (256U)
/* 256B */
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#elif defined(CPU_LINE_STM32L010x4)
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#define EEPROM_SIZE (128U)
/* 128B */
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
/* PERIPH_L0_PERIPH_CPU_H */
adc_res_t
adc_res_t
Possible ADC resolution settings.
Definition
adc.h:93
ADC_RES_16BIT
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition
adc.h:99
ADC_RES_8BIT
@ ADC_RES_8BIT
ADC resolution: 8 bit.
Definition
adc.h:95
ADC_RES_14BIT
@ ADC_RES_14BIT
ADC resolution: 14 bit.
Definition
adc.h:98
ADC_RES_6BIT
@ ADC_RES_6BIT
ADC resolution: 6 bit.
Definition
adc.h:94
ADC_RES_10BIT
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition
adc.h:96
ADC_RES_12BIT
@ ADC_RES_12BIT
ADC resolution: 12 bit.
Definition
adc.h:97
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