19#ifndef CFG_TIMER_DEFAULT_H
20#define CFG_TIMER_DEFAULT_H
25#include "periph_cpu.h"
39 .pm_mask = PM_APBCMASK_TC3,
40 .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
41#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
46 .flags = TC_CTRLA_MODE_COUNT16,
51 .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
52 .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
53#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
58 .flags = TC_CTRLA_MODE_COUNT32,
62#define TIMER_0_MAX_VALUE 0xffff
65#define TIMER_0_ISR isr_tc3
66#define TIMER_1_ISR isr_tc4
68#define TIMER_NUMOF ARRAY_SIZE(timer_config)
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
#define SAM0_GCLK_MAIN
120 MHz main clock
Timer device configuration.
Tc * dev
pointer to the used Timer device