39#define XTIMER_DEV (TIMER_DEV(0))
40#define XTIMER_HZ (250000UL)
41#define XTIMER_WIDTH (16)
42#define XTIMER_CHAN (0)
52#define BC_PIN GPIO_PIN(PA, 9)
59#define PB0_PIN GPIO_PIN(PC, 9)
60#define PB1_PIN GPIO_PIN(PC, 10)
67#define LED0_PIN GPIO_PIN(PF, 4)
68#define LED1_PIN GPIO_PIN(PF, 5)
75#define LED0_ON gpio_set(LED0_PIN)
76#define LED0_OFF gpio_clear(LED0_PIN)
77#define LED0_TOGGLE gpio_toggle(LED0_PIN)
78#define LED1_ON gpio_set(LED1_PIN)
79#define LED1_OFF gpio_clear(LED1_PIN)
80#define LED1_TOGGLE gpio_toggle(LED1_PIN)
89#define CORETEMP_ADC ADC_LINE(0)
98#define DISP_SPI SPI_DEV(0)
99#define DISP_COM_PIN GPIO_PIN(PF, 3)
100#define DISP_CS_PIN GPIO_PIN(PA, 10)
101#define DISP_EN_PIN GPIO_PIN(PA, 8)
110#define SI7021_I2C I2C_DEV(0)
111#define SI7021_EN_PIN GPIO_PIN(PC, 8)
113#define SI70XX_PARAM_I2C_DEV SI7021_I2C
Native CPU peripheral configuration.
Low-level GPIO peripheral driver interface definitions.
Low-level SPI peripheral driver interface definition.