MAX31343 internal register map and bit field definitions. More...
MAX31343 internal register map and bit field definitions.
Definition in file max313xx_internal.h.
Include dependency graph for max313xx_internal.h:Go to the source code of this file.
MAX31331 and MAX31343 shared registers | |
| #define | MAX313XX_I2C_ADDR (0x68U) |
| 7-bit I2C device address (slave byte = 0xD0) | |
| #define | MAX313XX_REG_STATUS (0x00U) |
| Status register. | |
| #define | MAX313XX_REG_INT_EN (0x01U) |
| Interrupt enable register. | |
| #define | MAX313XX_REG_RTC_RESET (0x02U) |
| RTC reset register. | |
| #define | MAX313XX_REG_RTC_CFG1 (0x03U) |
| RTC configuration register 1. | |
| #define | MAX313XX_REG_RTC_CFG2 (0x04U) |
| RTC configuration register 2. | |
| #define | MAX313XX_TIME_LEN (7U) |
| Number of time registers (sec..year) | |
| #define | MAX313XX_MONTH_CENTURY (1U << 7) |
| Century bit in month register. | |
| #define | MAX313XX_ALM1_LEN (6U) |
| Number of alarm 1 registers. | |
| #define | MAX313XX_ALM_MASK_BIT (1U << 7) |
| Alarm mask bit (disables field matching) | |
| #define | MAX313XX_ALM_DY_DT (1U << 6) |
| Day/date select bit in alarm day register. | |
| #define | MAX313XX_STATUS_A1F (1U << 0) |
| Alarm 1 flag in status register. | |
| #define | MAX313XX_STATUS_A2F (1U << 1) |
| Alarm 2 flag in status register. | |
| #define | MAX313XX_STATUS_OSF (1U << 6) |
| Oscillator stop flag; set on power-on, cleared by writing time registers. | |
| #define | MAX313XX_INTEN_A1IE (1U << 0) |
| Alarm 1 interrupt enable bit. | |
| #define | MAX313XX_INTEN_A2IE (1U << 1) |
| Alarm 2 interrupt enable bit. | |
| #define | MAX313XX_REG_TIMER_CFG |
| Timer configuration register. | |
| #define | MAX313XX_REG_TIME0 |
| First time register (seconds) | |
| #define | MAX313XX_RTC_CFG1_ENOSC |
| Enable oscillator bit in RTC_CFG1. | |
| #define | MAX313XX_RTC_CFG2_ENCLKO |
| Enable the Clock Output on CLKO. | |
| #define | MAX313XX_RTC_CFG2_CLKO_MASK |
| CLKOUT frequency field mask in RTC_CFG2. | |
| #define | MAX313XX_REG_ALM1_SEC |
| Alarm 1 seconds register. | |
| #define | MAX313Xx_REG_ALM1_MIN |
| Alarm 1 minutes register. | |
| #define | MAX313XX_REG_ALM1_HRS |
| Alarm 1 hours register. | |
| #define | MAX313XX_REG_ALM1_DAY_DATE |
| Alarm 1 day/date register. | |
| #define | MAX313XX_REG_ALM1_MON |
| Alarm 1 month register. | |
| #define | MAX313XX_REG_ALM1_YEAR |
| Alarm 1 year register. | |
| #define | MAX313XX_REG_TRICKLE |
| Trickle charger configuration register. | |
| #define | MAX313XX_TRICKLE_D_MASK |
| DIODE field mask. | |
| #define | MAX313XX_TRICKLE_D_DIODE |
| Diode select bit (0=no diode, 1=with diode) | |
| #define | MAX313XX_TRICKLE_D_RES_MASK |
| Resistor selection field mask. | |
MAX31331 specific registers | |
| #define | MAX31331_REG_TS_CFG (0x05U) |
| Timestamp configuration register. | |
| #define | MAX31331_TRICKLE_ENABLE (1U << 0) |
| Enable the trickle charger. | |
| #define | MAX31331_TRICKLE_RES_SHIFT (1U << 0) |
| TRICKLE field shift in trickle register. | |
MAX31343 specific registers | |
| #define | MAX31343_RTC_CFG2_SQW_HZ_MASK (0x07U) |
| SQW frequency field mask in RTC_CFG2. | |
| #define | MAX31343_REG_TEMP_MSB (0x1AU) |
| Temperature MSB register. | |
| #define | MAX31343_REG_TEMP_LSB (0x1BU) |
| Temperature LSB register. | |
| #define | MAX31343_REG_TS_CONFIG (0x1CU) |
| Temperature sensor configuration register. | |
| #define | MAX31343_TS_AUTOMODE (1U << 7) |
| Automatic temperature conversion enable bit. | |
| #define | MAX31343_TS_TTSINT_MASK (0x38U) |
| Temperature conversion interval field mask. | |
| #define | MAX31343_TS_TTSINT_SHIFT (3U) |
| Temperature conversion interval field shift. | |
| #define | MAX31343_TRICKLE_TCHE_SHIFT (4U) |
| TCHE field shift in trickle register. | |
| #define | MAX31343_TRICKLE_TCHE_MASK (0xF0U) |
| TCHE field mask in trickle register. | |
| #define | MAX31343_TRICKLE_TCHE_ENABLE (0x5U) |
| Only value that enables trickle charger; all other values disable it. | |
| #define MAX31331_REG_TS_CFG (0x05U) |
Timestamp configuration register.
Definition at line 142 of file max313xx_internal.h.
| #define MAX31331_TRICKLE_ENABLE (1U << 0) |
Enable the trickle charger.
Definition at line 144 of file max313xx_internal.h.
| #define MAX31331_TRICKLE_RES_SHIFT (1U << 0) |
TRICKLE field shift in trickle register.
Definition at line 145 of file max313xx_internal.h.
| #define MAX31343_REG_TEMP_LSB (0x1BU) |
Temperature LSB register.
Definition at line 155 of file max313xx_internal.h.
| #define MAX31343_REG_TEMP_MSB (0x1AU) |
Temperature MSB register.
Definition at line 154 of file max313xx_internal.h.
| #define MAX31343_REG_TS_CONFIG (0x1CU) |
Temperature sensor configuration register.
Definition at line 156 of file max313xx_internal.h.
| #define MAX31343_RTC_CFG2_SQW_HZ_MASK (0x07U) |
SQW frequency field mask in RTC_CFG2.
Definition at line 152 of file max313xx_internal.h.
| #define MAX31343_TRICKLE_TCHE_ENABLE (0x5U) |
Only value that enables trickle charger; all other values disable it.
Definition at line 164 of file max313xx_internal.h.
| #define MAX31343_TRICKLE_TCHE_MASK (0xF0U) |
TCHE field mask in trickle register.
Definition at line 163 of file max313xx_internal.h.
| #define MAX31343_TRICKLE_TCHE_SHIFT (4U) |
TCHE field shift in trickle register.
Definition at line 162 of file max313xx_internal.h.
| #define MAX31343_TS_AUTOMODE (1U << 7) |
Automatic temperature conversion enable bit.
Definition at line 158 of file max313xx_internal.h.
| #define MAX31343_TS_TTSINT_MASK (0x38U) |
Temperature conversion interval field mask.
Definition at line 159 of file max313xx_internal.h.
| #define MAX31343_TS_TTSINT_SHIFT (3U) |
Temperature conversion interval field shift.
Definition at line 160 of file max313xx_internal.h.
| #define MAX313XX_ALM1_LEN (6U) |
Number of alarm 1 registers.
Definition at line 46 of file max313xx_internal.h.
| #define MAX313XX_ALM_DY_DT (1U << 6) |
Day/date select bit in alarm day register.
Definition at line 49 of file max313xx_internal.h.
| #define MAX313XX_ALM_MASK_BIT (1U << 7) |
Alarm mask bit (disables field matching)
Definition at line 48 of file max313xx_internal.h.
| #define MAX313XX_I2C_ADDR (0x68U) |
7-bit I2C device address (slave byte = 0xD0)
Definition at line 33 of file max313xx_internal.h.
| #define MAX313XX_INTEN_A1IE (1U << 0) |
Alarm 1 interrupt enable bit.
Definition at line 56 of file max313xx_internal.h.
| #define MAX313XX_INTEN_A2IE (1U << 1) |
Alarm 2 interrupt enable bit.
Definition at line 57 of file max313xx_internal.h.
| #define MAX313XX_MONTH_CENTURY (1U << 7) |
Century bit in month register.
Definition at line 44 of file max313xx_internal.h.
| #define MAX313XX_REG_ALM1_DAY_DATE |
Alarm 1 day/date register.
Definition at line 124 of file max313xx_internal.h.
| #define MAX313XX_REG_ALM1_HRS |
Alarm 1 hours register.
Definition at line 123 of file max313xx_internal.h.
| #define MAX313Xx_REG_ALM1_MIN |
Alarm 1 minutes register.
Definition at line 122 of file max313xx_internal.h.
| #define MAX313XX_REG_ALM1_MON |
Alarm 1 month register.
Definition at line 125 of file max313xx_internal.h.
| #define MAX313XX_REG_ALM1_SEC |
Alarm 1 seconds register.
Definition at line 121 of file max313xx_internal.h.
| #define MAX313XX_REG_ALM1_YEAR |
Alarm 1 year register.
Definition at line 126 of file max313xx_internal.h.
| #define MAX313XX_REG_INT_EN (0x01U) |
Interrupt enable register.
Definition at line 37 of file max313xx_internal.h.
| #define MAX313XX_REG_RTC_CFG1 (0x03U) |
RTC configuration register 1.
Definition at line 39 of file max313xx_internal.h.
| #define MAX313XX_REG_RTC_CFG2 (0x04U) |
RTC configuration register 2.
Definition at line 40 of file max313xx_internal.h.
| #define MAX313XX_REG_RTC_RESET (0x02U) |
RTC reset register.
Definition at line 38 of file max313xx_internal.h.
| #define MAX313XX_REG_STATUS (0x00U) |
Status register.
Definition at line 36 of file max313xx_internal.h.
| #define MAX313XX_REG_TIME0 |
First time register (seconds)
Definition at line 114 of file max313xx_internal.h.
| #define MAX313XX_REG_TIMER_CFG |
Timer configuration register.
Definition at line 107 of file max313xx_internal.h.
| #define MAX313XX_REG_TRICKLE |
Trickle charger configuration register.
Definition at line 128 of file max313xx_internal.h.
| #define MAX313XX_RTC_CFG1_ENOSC |
Enable oscillator bit in RTC_CFG1.
Definition at line 116 of file max313xx_internal.h.
| #define MAX313XX_RTC_CFG2_CLKO_MASK |
CLKOUT frequency field mask in RTC_CFG2.
Definition at line 119 of file max313xx_internal.h.
| #define MAX313XX_RTC_CFG2_ENCLKO |
Enable the Clock Output on CLKO.
Definition at line 118 of file max313xx_internal.h.
| #define MAX313XX_STATUS_A1F (1U << 0) |
Alarm 1 flag in status register.
Definition at line 51 of file max313xx_internal.h.
| #define MAX313XX_STATUS_A2F (1U << 1) |
Alarm 2 flag in status register.
Definition at line 52 of file max313xx_internal.h.
| #define MAX313XX_STATUS_OSF (1U << 6) |
Oscillator stop flag; set on power-on, cleared by writing time registers.
Definition at line 53 of file max313xx_internal.h.
| #define MAX313XX_TIME_LEN (7U) |
Number of time registers (sec..year)
Definition at line 42 of file max313xx_internal.h.
| #define MAX313XX_TRICKLE_D_DIODE |
Diode select bit (0=no diode, 1=with diode)
Definition at line 131 of file max313xx_internal.h.
| #define MAX313XX_TRICKLE_D_MASK |
DIODE field mask.
Definition at line 130 of file max313xx_internal.h.
| #define MAX313XX_TRICKLE_D_RES_MASK |
Resistor selection field mask.
Definition at line 132 of file max313xx_internal.h.