Internal addresses, registers and constants. More...
Detailed Description
Internal addresses, registers and constants.
Definition in file gc9a01_internal.h.
#include "lcd_internal.h"
Include dependency graph for gc9a01_internal.h:Go to the source code of this file.
LCD GC9A01 commands | |
LCD commands extension available for GC9A01 LCD controllers | |
| #define | GC9A01_REG_ID (0x04) |
| Display identification information. | |
| #define | GC9A01_REG_POWER7 (0xA7) |
| Power Control 7. | |
| #define | GC9A01_REG_POWER1 (0xC1) |
| Power Control 1. | |
| #define | GC9A01_REG_POWER2 (0xC3) |
| Power Control 2. | |
| #define | GC9A01_REG_POWER3 (0xC4) |
| Power Control 3. | |
| #define | GC9A01_REG_POWER4 (0xC9) |
| Power Control 4. | |
| #define | GC9A01_REG_FRAMERATE (0xE8) |
| Frame rate control. | |
| #define | GC9A01_REG_INREGEN1 (0xFE) |
| Inter register enable 1. | |
| #define | GC9A01_REG_INREGEN2 (0xEF) |
| Inter register enable 2. | |
| #define | GC9A01_REG_GAMMA1 (0xF0) |
| Set gamma 1. | |
| #define | GC9A01_REG_GAMMA2 (0xF1) |
| Set gamma 2. | |
| #define | GC9A01_REG_GAMMA3 (0xF2) |
| Set gamma 3. | |
| #define | GC9A01_REG_GAMMA4 (0xF3) |
| Set gamma 4. | |
LCD GC9A01 values | |
| #define | GC9A01_16_BIT_FORMAT (0x55) |
| COLMOD value for 16 bit pixel format. | |
| #define | GC9A01_VRH_DEFAULT (0x28) |
| Default value for VRH. | |
| #define | GC9A01_FRAMERATE_4DOT_INVERSION (0x34) |
| Framrate register value to enable 4 dot inversion. | |
Macro Definition Documentation
◆ GC9A01_16_BIT_FORMAT
| #define GC9A01_16_BIT_FORMAT (0x55) |
COLMOD value for 16 bit pixel format.
Definition at line 50 of file gc9a01_internal.h.
◆ GC9A01_FRAMERATE_4DOT_INVERSION
| #define GC9A01_FRAMERATE_4DOT_INVERSION (0x34) |
Framrate register value to enable 4 dot inversion.
Definition at line 54 of file gc9a01_internal.h.
◆ GC9A01_REG_FRAMERATE
| #define GC9A01_REG_FRAMERATE (0xE8) |
Frame rate control.
Definition at line 36 of file gc9a01_internal.h.
◆ GC9A01_REG_GAMMA1
| #define GC9A01_REG_GAMMA1 (0xF0) |
Set gamma 1.
Definition at line 39 of file gc9a01_internal.h.
◆ GC9A01_REG_GAMMA2
| #define GC9A01_REG_GAMMA2 (0xF1) |
Set gamma 2.
Definition at line 40 of file gc9a01_internal.h.
◆ GC9A01_REG_GAMMA3
| #define GC9A01_REG_GAMMA3 (0xF2) |
Set gamma 3.
Definition at line 41 of file gc9a01_internal.h.
◆ GC9A01_REG_GAMMA4
| #define GC9A01_REG_GAMMA4 (0xF3) |
Set gamma 4.
Definition at line 42 of file gc9a01_internal.h.
◆ GC9A01_REG_ID
| #define GC9A01_REG_ID (0x04) |
Display identification information.
Definition at line 30 of file gc9a01_internal.h.
◆ GC9A01_REG_INREGEN1
| #define GC9A01_REG_INREGEN1 (0xFE) |
Inter register enable 1.
Definition at line 37 of file gc9a01_internal.h.
◆ GC9A01_REG_INREGEN2
| #define GC9A01_REG_INREGEN2 (0xEF) |
Inter register enable 2.
Definition at line 38 of file gc9a01_internal.h.
◆ GC9A01_REG_POWER1
| #define GC9A01_REG_POWER1 (0xC1) |
Power Control 1.
Definition at line 32 of file gc9a01_internal.h.
◆ GC9A01_REG_POWER2
| #define GC9A01_REG_POWER2 (0xC3) |
Power Control 2.
Definition at line 33 of file gc9a01_internal.h.
◆ GC9A01_REG_POWER3
| #define GC9A01_REG_POWER3 (0xC4) |
Power Control 3.
Definition at line 34 of file gc9a01_internal.h.
◆ GC9A01_REG_POWER4
| #define GC9A01_REG_POWER4 (0xC9) |
Power Control 4.
Definition at line 35 of file gc9a01_internal.h.
◆ GC9A01_REG_POWER7
| #define GC9A01_REG_POWER7 (0xA7) |
Power Control 7.
Definition at line 31 of file gc9a01_internal.h.
◆ GC9A01_VRH_DEFAULT
| #define GC9A01_VRH_DEFAULT (0x28) |
Default value for VRH.
Definition at line 52 of file gc9a01_internal.h.
