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board.h
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1/*
2 * Copyright (C) 2017 Eistec AB
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser General
5 * Public License v2.1. See the file LICENSE in the top level directory for more
6 * details.
7 */
8
19#ifndef BOARD_H
20#define BOARD_H
21
22#include "cpu.h"
23#include "board_common.h"
24#include "periph_conf.h"
25
26#ifdef __cplusplus
27extern "C"
28{
29#endif
30
35#define LED0_PIN GPIO_PIN(PORT_B, 0)
36#define LED0_MASK (1 << 0)
37#define LED0_ON (GPIOB->PCOR = LED0_MASK)
38#define LED0_OFF (GPIOB->PSOR = LED0_MASK)
39#define LED0_TOGGLE (GPIOB->PTOR = LED0_MASK)
40#define LED1_PIN GPIO_PIN(PORT_C, 1)
41#define LED1_MASK (1 << 1)
42#define LED1_ON (GPIOC->PCOR = LED1_MASK)
43#define LED1_OFF (GPIOC->PSOR = LED1_MASK)
44#define LED1_TOGGLE (GPIOC->PTOR = LED1_MASK)
45#define LED2_PIN GPIO_PIN(PORT_A, 19)
46#define LED2_MASK (1 << 19)
47#define LED2_ON (GPIOA->PCOR = LED2_MASK)
48#define LED2_OFF (GPIOA->PSOR = LED2_MASK)
49#define LED2_TOGGLE (GPIOA->PTOR = LED2_MASK)
50#define LED3_PIN GPIO_PIN(PORT_A, 18)
51#define LED3_MASK (1 << 18)
52#define LED3_ON (GPIOA->PCOR = LED3_MASK)
53#define LED3_OFF (GPIOA->PSOR = LED3_MASK)
54#define LED3_TOGGLE (GPIOA->PTOR = LED3_MASK)
61/* SW3, SW4 will short these pins to ground when pushed but there are no
62 * external pull resistors, use internal pull-ups on the pins */
63/* BTN0 is mapped to SW3 */
64#define BTN0_PIN GPIO_PIN(PORT_C, 4)
65#define BTN0_MODE GPIO_IN_PU
66/* BTN1 is mapped to SW4 */
67#define BTN1_PIN GPIO_PIN(PORT_C, 5)
68#define BTN1_MODE GPIO_IN_PU
75#if IS_ACTIVE(KINETIS_XTIMER_SOURCE_PIT)
76/* PIT xtimer configuration */
77#define XTIMER_DEV (TIMER_PIT_DEV(0))
78#define XTIMER_CHAN (0)
79/* Default xtimer settings should work on the PIT */
80#else
81/* LPTMR xtimer configuration */
82#define XTIMER_DEV (TIMER_LPTMR_DEV(0))
83#define XTIMER_CHAN (0)
84/* LPTMR is 16 bits wide and runs at 32768 Hz (clocked by the RTC) */
85#define XTIMER_WIDTH (16)
86#define XTIMER_BACKOFF (5)
87#define XTIMER_ISR_BACKOFF (5)
88#define XTIMER_HZ (32768ul)
89#endif
96#define CONFIG_ZTIMER_USEC_TYPE ZTIMER_TYPE_PERIPH_TIMER
97#define CONFIG_ZTIMER_USEC_DEV (TIMER_PIT_DEV(0))
104#define FRDM_NOR_SPI_DEV SPI_DEV(0)
105#define FRDM_NOR_SPI_CLK SPI_CLK_5MHZ
106#define FRDM_NOR_SPI_CS SPI_HWCS(0)
113#define FXOS8700_PARAM_I2C I2C_DEV(0)
114#define FXOS8700_PARAM_ADDR 0x1F
117#ifdef __cplusplus
118}
119#endif
120
121#endif /* BOARD_H */
Native CPU peripheral configuration.