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board.h
Go to the documentation of this file.
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/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2015 PHYTEC Messtechnik GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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#ifndef BOARD_H
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#define BOARD_H
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#include "cpu.h"
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#include "
periph_conf.h
"
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#ifdef __cplusplus
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extern
"C"
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{
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#endif
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#define LED0_PIN GPIO_PIN(PORT_B, 22)
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#define LED1_PIN GPIO_PIN(PORT_E, 26)
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#define LED2_PIN GPIO_PIN(PORT_B, 21)
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#define LED0_MASK (1 << 22)
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#define LED1_MASK (1 << 26)
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#define LED2_MASK (1 << 21)
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#define LED0_ON (GPIOB->PCOR = LED0_MASK)
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#define LED0_OFF (GPIOB->PSOR = LED0_MASK)
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#define LED0_TOGGLE (GPIOB->PTOR = LED0_MASK)
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#define LED1_ON (GPIOE->PCOR = LED1_MASK)
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#define LED1_OFF (GPIOE->PSOR = LED1_MASK)
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#define LED1_TOGGLE (GPIOE->PTOR = LED1_MASK)
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#define LED2_ON (GPIOB->PCOR = LED2_MASK)
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#define LED2_OFF (GPIOB->PSOR = LED2_MASK)
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#define LED2_TOGGLE (GPIOB->PTOR = LED2_MASK)
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/* SW2, SW3 will short these pins to ground when pushed. PTA4 has an external
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* pull-up resistor to VDD, but there is no external pull resistor on PTC6 */
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/* BTN0 is mapped to SW2 */
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#define BTN0_PIN GPIO_PIN(PORT_C, 6)
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#define BTN0_MODE GPIO_IN_PU
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/* BTN1 is mapped to SW3 */
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#define BTN1_PIN GPIO_PIN(PORT_A, 4)
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#define BTN1_MODE GPIO_IN_PU
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#define FXOS8700_PARAM_I2C I2C_DEV(0)
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#define FXOS8700_PARAM_ADDR 0x1E
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#ifdef __cplusplus
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}
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#endif
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#endif
/* BOARD_H */
periph_conf.h
Native CPU peripheral configuration.
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