FDCAN specific definitions. More...
Detailed Description
FDCAN specific definitions.
Definition in file fdcandev_stm32.h.
#include "can/candev.h"
Include dependency graph for fdcandev_stm32.h:Go to the source code of this file.
Data Structures | |
| struct | can_conf_t |
| ESP CAN device configuration. More... | |
| struct | candev_stm32_rx_mailbox |
| This structure holds anything related to the receive part. More... | |
| struct | candev_stm32_isr |
| Internal interrupt flags. More... | |
| struct | can |
| Low level device structure for ESP32 CAN (extension of candev_t) More... | |
Macros | |
| #define | FDCANDEV_STM32_CHAN_NUMOF 1 |
| Number of channels in the device (up to 3) | |
| #define | FDCANDEV_STM32_DEFAULT_SPT 875 |
| Default sampling-point. | |
| #define | HAVE_CAN_CONF_T |
| can_conf_t is re-defined | |
| #define | HAVE_CAN_T |
| can_t is re-defined | |
| #define | FDCAN_SRAM_MESSAGE_RAM_SIZE 0x350 |
| FDCAN SRAM message size. | |
Typedefs | |
| typedef struct candev_stm32_rx_mailbox | candev_stm32_rx_mailbox_t |
| This structure holds anything related to the receive part. | |
| typedef struct candev_stm32_isr | candev_stm32_isr_t |
| Internal interrupt flags. | |
Functions | |
| void | candev_stm32_set_pins (can_t *dev, gpio_t tx_pin, gpio_t rx_pin, gpio_af_t af) |
| Set the pins of an stm32 CAN device. | |
ISR functions | |
| #define | ISR_FDCAN1_IT0 isr_fdcan1_it0 |
| Interrupt line 0. | |
| #define | ISR_FDCAN1_IT1 isr_fdcan1_it1 |
| Interrupt line 1. | |
Filters | |
| #define | FDCAN_STM32_NB_STD_FILTER 28U |
| Number of standard filters. | |
| #define | FDCAN_STM32_NB_EXT_FILTER 8U |
| Number of extended filters. | |
| #define | FDCAN_STM32_NB_FILTER (FDCAN_STM32_NB_STD_FILTER + FDCAN_STM32_NB_EXT_FILTER) |
| Total number of filters. | |
Birates | |
| #define | FDCANDEV_STM32_DEFAULT_BITRATE 500000U |
| Default bitrate for headers and non-FDCAN messages. | |
| #define | FDCANDEV_STM32_DEFAULT_FD_DATA_BITRATE 1000000U |
| Default FDCAN data bitrate. | |
STM32 mailboxes | |
| #define | FDCAN_STM32_TX_MAILBOXES 3 |
| Number of frame the driver can transmit simultaneously. | |
| #define | FDCAN_STM32_RX_MAILBOXES (FDCANDEV_STM32_CHAN_NUMOF * 6) |
| Maximum number of frame the driver can receive simultaneously. | |
Message RAM addresses - 32 bits aligned | |
| #define | FDCAN_SRAM_FLESA 0x1CU |
| Filter List Extended Start Address. | |
| #define | FDCAN_SRAM_F0SA 0x2CU |
| Rx FIFO0 Start Address. | |
| #define | FDCAN_SRAM_F1SA 0x62U |
| Rx FIFO1 Start Address. | |
| #define | FDCAN_SRAM_EFSA 0x98U |
| Event FIFO Start Address. | |
| #define | FDCAN_SRAM_TBSA 0x9EU |
| Tx Buffer Start Address. | |
Standard filter bit definition | |
| #define | FDCAN_SRAM_FLS_SFID1_Pos (16U) |
| Standard filter ID 1 position. | |
| #define | FDCAN_SRAM_FLS_SFID1_Msk (0x7FFU << FDCAN_SRAM_FLS_SFID1_Pos) |
| Standard filter ID 1 mask. | |
| #define | FDCAN_SRAM_FLS_SFID1 FDCAN_SRAM_FLS_SFID1_Msk |
| Standard filter ID 1. | |
| #define | FDCAN_SRAM_FLS_SFID2_Msk (0x7FFU) |
| Standard filter ID 2 mask. | |
| #define | FDCAN_SRAM_FLS_SFID2 FDCAN_SRAM_FLS_SFID2_Msk |
| Standard filter ID 2. | |
| #define | FDCAN_SRAM_FLS_SFT_Pos (30U) |
| Standard filter type position. | |
| #define | FDCAN_SRAM_FLS_SFT_Msk (0x3U << FDCAN_SRAM_FLS_SFT_Pos) |
| Standard filter type mask. | |
| #define | FDCAN_SRAM_FLS_SFT FDCAN_SRAM_FLS_SFT_Msk |
| Standard filter type. | |
| #define | FDCAN_SRAM_FLS_SFEC_Pos (27U) |
| Standard filter element configuration position. | |
| #define | FDCAN_SRAM_FLS_SFEC_Msk (0x7U << FDCAN_SRAM_FLS_SFEC_Pos) |
| Standard filter element configuration mask. | |
| #define | FDCAN_SRAM_FLS_SFEC FDCAN_SRAM_FLS_SFEC_Msk |
| Standard filter element configuration. | |
Standard filter configuration | |
| #define | FDCAN_SRAM_FLS_FILTER_SIZE 1U |
| Standard filter size. | |
| #define | FDCAN_SRAM_FLS_SFT_DISABLED (0x3U << FDCAN_SRAM_FLS_SFT_Pos) |
| Filter element disabled. | |
| #define | FDCAN_SRAM_FLS_SFT_CLASSIC (0x2U << FDCAN_SRAM_FLS_SFT_Pos) |
| Classic filter. | |
| #define | FDCAN_SRAM_FLS_SFEC_DISABLED (0x0U << FDCAN_SRAM_FLS_SFEC_Pos) |
| Filter element disabled. | |
| #define | FDCAN_SRAM_FLS_SFEC_FIFO0 (0x1U << FDCAN_SRAM_FLS_SFEC_Pos) |
| Use FIFO0 if filter matches. | |
| #define | FDCAN_SRAM_FLS_SFEC_FIFO1 (0x2U << FDCAN_SRAM_FLS_SFEC_Pos) |
| Use FIFO1 if filter matches. | |
Extended filter bit definition | |
| #define | FDCAN_SRAM_FLE_F0_EFID1_Msk 0x1FFFFFFFU |
| Extended filter ID 1 mask. | |
| #define | FDCAN_SRAM_FLE_F0_EFID1 FDCAN_SRAM_FLE_F0_EFID1_Msk |
| Extended filter ID 1. | |
| #define | FDCAN_SRAM_FLE_F1_EFID2_Msk 0x1FFFFFFFU |
| Extended filter ID 2 mask. | |
| #define | FDCAN_SRAM_FLE_F1_EFID2 FDCAN_SRAM_FLE_F1_EFID2_Msk |
| Extended filter ID 2. | |
| #define | FDCAN_SRAM_FLE_F1_EFT_Pos 30U |
| Extended filter type position. | |
| #define | FDCAN_SRAM_FLE_F1_EFT_Msk (0x3U << FDCAN_SRAM_FLE_F1_EFT_Pos) |
| Extended filter type mask. | |
| #define | FDCAN_SRAM_FLE_F1_EFT FDCAN_SRAM_FLE_F1_EFT_Msk |
| Extended filter type. | |
| #define | FDCAN_SRAM_FLE_F0_EFEC_Pos 29U |
| Extended filter element configuration position. | |
| #define | FDCAN_SRAM_FLE_F0_EFEC_Msk (0x7U << FDCAN_SRAM_FLE_F0_EFEC_Pos) |
| Extended filter element configuration mask. | |
| #define | FDCAN_SRAM_FLE_F0_EFEC FDCAN_SRAM_FLE_F0_EFEC_Msk |
| Extended filter element configuration. | |
Extended filter configuration | |
| #define | FDCAN_SRAM_FLE_FILTER_SIZE 2U |
| Extended filter size. | |
| #define | FDCAN_SRAM_FLE_F1_EFT_CLASSIC (0x2U << FDCAN_SRAM_FLE_F1_EFT_Pos) |
| Classic filter. | |
| #define | FDCAN_SRAM_FLE_F0_EFEC_DISABLED (0x0U) |
| Disabled filter. | |
| #define | FDCAN_SRAM_FLE_F0_EFEC_FIFO0 (0x1U << FDCAN_SRAM_FLE_F0_EFEC_Pos) |
| Use FIFO0 if filter matches. | |
| #define | FDCAN_SRAM_FLE_F0_EFEC_FIFO1 (0x2U << FDCAN_SRAM_FLE_F0_EFEC_Pos) |
| Use FIFI1 if filter matches. | |
Macro Definition Documentation
◆ FDCAN_SRAM_EFSA
| #define FDCAN_SRAM_EFSA 0x98U |
Event FIFO Start Address.
Definition at line 135 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_F0SA
| #define FDCAN_SRAM_F0SA 0x2CU |
Rx FIFO0 Start Address.
Definition at line 133 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_F1SA
| #define FDCAN_SRAM_F1SA 0x62U |
Rx FIFO1 Start Address.
Definition at line 134 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F0_EFEC
| #define FDCAN_SRAM_FLE_F0_EFEC FDCAN_SRAM_FLE_F0_EFEC_Msk |
Extended filter element configuration.
Definition at line 207 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F0_EFEC_DISABLED
| #define FDCAN_SRAM_FLE_F0_EFEC_DISABLED (0x0U) |
Disabled filter.
Definition at line 219 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F0_EFEC_FIFO0
| #define FDCAN_SRAM_FLE_F0_EFEC_FIFO0 (0x1U << FDCAN_SRAM_FLE_F0_EFEC_Pos) |
Use FIFO0 if filter matches.
Definition at line 221 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F0_EFEC_FIFO1
| #define FDCAN_SRAM_FLE_F0_EFEC_FIFO1 (0x2U << FDCAN_SRAM_FLE_F0_EFEC_Pos) |
Use FIFI1 if filter matches.
Definition at line 223 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F0_EFEC_Msk
| #define FDCAN_SRAM_FLE_F0_EFEC_Msk (0x7U << FDCAN_SRAM_FLE_F0_EFEC_Pos) |
Extended filter element configuration mask.
Definition at line 205 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F0_EFEC_Pos
| #define FDCAN_SRAM_FLE_F0_EFEC_Pos 29U |
Extended filter element configuration position.
Definition at line 203 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F0_EFID1
| #define FDCAN_SRAM_FLE_F0_EFID1 FDCAN_SRAM_FLE_F0_EFID1_Msk |
Extended filter ID 1.
Definition at line 191 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F0_EFID1_Msk
| #define FDCAN_SRAM_FLE_F0_EFID1_Msk 0x1FFFFFFFU |
Extended filter ID 1 mask.
Definition at line 189 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F1_EFID2
| #define FDCAN_SRAM_FLE_F1_EFID2 FDCAN_SRAM_FLE_F1_EFID2_Msk |
Extended filter ID 2.
Definition at line 195 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F1_EFID2_Msk
| #define FDCAN_SRAM_FLE_F1_EFID2_Msk 0x1FFFFFFFU |
Extended filter ID 2 mask.
Definition at line 193 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F1_EFT
| #define FDCAN_SRAM_FLE_F1_EFT FDCAN_SRAM_FLE_F1_EFT_Msk |
Extended filter type.
Definition at line 201 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F1_EFT_CLASSIC
| #define FDCAN_SRAM_FLE_F1_EFT_CLASSIC (0x2U << FDCAN_SRAM_FLE_F1_EFT_Pos) |
Classic filter.
Definition at line 217 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F1_EFT_Msk
| #define FDCAN_SRAM_FLE_F1_EFT_Msk (0x3U << FDCAN_SRAM_FLE_F1_EFT_Pos) |
Extended filter type mask.
Definition at line 199 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_F1_EFT_Pos
| #define FDCAN_SRAM_FLE_F1_EFT_Pos 30U |
Extended filter type position.
Definition at line 197 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLE_FILTER_SIZE
| #define FDCAN_SRAM_FLE_FILTER_SIZE 2U |
Extended filter size.
Definition at line 215 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLESA
| #define FDCAN_SRAM_FLESA 0x1CU |
Filter List Extended Start Address.
Definition at line 132 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_FILTER_SIZE
| #define FDCAN_SRAM_FLS_FILTER_SIZE 1U |
Standard filter size.
Definition at line 171 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFEC
| #define FDCAN_SRAM_FLS_SFEC FDCAN_SRAM_FLS_SFEC_Msk |
Standard filter element configuration.
Definition at line 163 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFEC_DISABLED
| #define FDCAN_SRAM_FLS_SFEC_DISABLED (0x0U << FDCAN_SRAM_FLS_SFEC_Pos) |
Filter element disabled.
Definition at line 177 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFEC_FIFO0
| #define FDCAN_SRAM_FLS_SFEC_FIFO0 (0x1U << FDCAN_SRAM_FLS_SFEC_Pos) |
Use FIFO0 if filter matches.
Definition at line 179 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFEC_FIFO1
| #define FDCAN_SRAM_FLS_SFEC_FIFO1 (0x2U << FDCAN_SRAM_FLS_SFEC_Pos) |
Use FIFO1 if filter matches.
Definition at line 181 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFEC_Msk
| #define FDCAN_SRAM_FLS_SFEC_Msk (0x7U << FDCAN_SRAM_FLS_SFEC_Pos) |
Standard filter element configuration mask.
Definition at line 161 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFEC_Pos
| #define FDCAN_SRAM_FLS_SFEC_Pos (27U) |
Standard filter element configuration position.
Definition at line 159 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFID1
| #define FDCAN_SRAM_FLS_SFID1 FDCAN_SRAM_FLS_SFID1_Msk |
Standard filter ID 1.
Definition at line 147 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFID1_Msk
| #define FDCAN_SRAM_FLS_SFID1_Msk (0x7FFU << FDCAN_SRAM_FLS_SFID1_Pos) |
Standard filter ID 1 mask.
Definition at line 145 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFID1_Pos
| #define FDCAN_SRAM_FLS_SFID1_Pos (16U) |
Standard filter ID 1 position.
Definition at line 143 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFID2
| #define FDCAN_SRAM_FLS_SFID2 FDCAN_SRAM_FLS_SFID2_Msk |
Standard filter ID 2.
Definition at line 151 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFID2_Msk
| #define FDCAN_SRAM_FLS_SFID2_Msk (0x7FFU) |
Standard filter ID 2 mask.
Definition at line 149 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFT
| #define FDCAN_SRAM_FLS_SFT FDCAN_SRAM_FLS_SFT_Msk |
Standard filter type.
Definition at line 157 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFT_CLASSIC
| #define FDCAN_SRAM_FLS_SFT_CLASSIC (0x2U << FDCAN_SRAM_FLS_SFT_Pos) |
Classic filter.
Definition at line 175 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFT_DISABLED
| #define FDCAN_SRAM_FLS_SFT_DISABLED (0x3U << FDCAN_SRAM_FLS_SFT_Pos) |
Filter element disabled.
Definition at line 173 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFT_Msk
| #define FDCAN_SRAM_FLS_SFT_Msk (0x3U << FDCAN_SRAM_FLS_SFT_Pos) |
Standard filter type mask.
Definition at line 155 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_FLS_SFT_Pos
| #define FDCAN_SRAM_FLS_SFT_Pos (30U) |
Standard filter type position.
Definition at line 153 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_MESSAGE_RAM_SIZE
| #define FDCAN_SRAM_MESSAGE_RAM_SIZE 0x350 |
FDCAN SRAM message size.
Definition at line 126 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_ELEMENT_SIZE
| #define FDCAN_SRAM_RXFIFO_ELEMENT_SIZE 18U |
Rx FIFO element size.
Definition at line 361 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_ESI
| #define FDCAN_SRAM_RXFIFO_R0_ESI FDCAN_SRAM_RXFIFO_R0_ESI_Msk |
Error State Indicator.
Definition at line 309 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_ESI_Msk
| #define FDCAN_SRAM_RXFIFO_R0_ESI_Msk (0x1U << FDCAN_SRAM_RXFIFO_R0_ESI_Pos) |
Error State Indicator mask.
Definition at line 307 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_ESI_PASSIVE_FLAG
| #define FDCAN_SRAM_RXFIFO_R0_ESI_PASSIVE_FLAG (0x0U << FDCAN_SRAM_RXFIFO_R0_ESI_Pos) |
ESI bit in CAN FD format depends only on error passive flag.
Definition at line 363 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_ESI_Pos
| #define FDCAN_SRAM_RXFIFO_R0_ESI_Pos 31U |
Error State Indicator position.
Definition at line 305 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_ESI_RECESSIVE
| #define FDCAN_SRAM_RXFIFO_R0_ESI_RECESSIVE (0x1U << FDCAN_SRAM_RXFIFO_R0_ESI_Pos) |
ESI bit in CAN FD format transmitted recessive.
Definition at line 365 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_ID
| #define FDCAN_SRAM_RXFIFO_R0_ID FDCAN_SRAM_RXFIFO_R0_ID_Msk |
Identifier.
Definition at line 327 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_ID_Msk
| #define FDCAN_SRAM_RXFIFO_R0_ID_Msk 0x1FFFFFFFU |
Identifier mask.
Definition at line 325 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_ID_Pos
| #define FDCAN_SRAM_RXFIFO_R0_ID_Pos 18U |
Standard Identifier position.
Definition at line 323 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_RTR
| #define FDCAN_SRAM_RXFIFO_R0_RTR FDCAN_SRAM_RXFIFO_R0_RTR_Msk |
Remote transmission request.
Definition at line 321 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_RTR_Msk
| #define FDCAN_SRAM_RXFIFO_R0_RTR_Msk (0x1U << FDCAN_SRAM_RXFIFO_R0_RTR_Pos) |
Remote transmission request mask.
Definition at line 319 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_RTR_Pos
| #define FDCAN_SRAM_RXFIFO_R0_RTR_Pos 29U |
Remote transmission request position.
Definition at line 317 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_XTD
| #define FDCAN_SRAM_RXFIFO_R0_XTD FDCAN_SRAM_RXFIFO_R0_XTD_Msk |
Extended Identifier.
Definition at line 315 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_XTD_Msk
| #define FDCAN_SRAM_RXFIFO_R0_XTD_Msk (0x1U << FDCAN_SRAM_RXFIFO_R0_XTD_Pos) |
Extended Identifier mask.
Definition at line 313 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R0_XTD_Pos
| #define FDCAN_SRAM_RXFIFO_R0_XTD_Pos 30U |
Extended Identifier position.
Definition at line 311 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_BRS
| #define FDCAN_SRAM_RXFIFO_R1_BRS FDCAN_SRAM_RXFIFO_R1_BRS_Msk |
Bit Rate Switching.
Definition at line 345 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_BRS_Msk
| #define FDCAN_SRAM_RXFIFO_R1_BRS_Msk (0x1U << FDCAN_SRAM_RXFIFO_R1_BRS_Pos) |
Bit Rate Switching mask.
Definition at line 343 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_BRS_OFF
| #define FDCAN_SRAM_RXFIFO_R1_BRS_OFF (0x0U << FDCAN_SRAM_RXFIFO_R1_BRS_Pos) |
CAN FD bit rate switching enabled.
Definition at line 375 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_BRS_ON
| #define FDCAN_SRAM_RXFIFO_R1_BRS_ON (0x1U << FDCAN_SRAM_RXFIFO_R1_BRS_Pos) |
CAN FD bit rate switching disabled.
Definition at line 377 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_BRS_Pos
| #define FDCAN_SRAM_RXFIFO_R1_BRS_Pos 20U |
Bit Rate Switching position.
Definition at line 341 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_DLC
| #define FDCAN_SRAM_RXFIFO_R1_DLC FDCAN_SRAM_RXFIFO_R1_DLC_Msk |
Data Length Code.
Definition at line 351 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_DLC_Msk
| #define FDCAN_SRAM_RXFIFO_R1_DLC_Msk (0xFU << FDCAN_SRAM_RXFIFO_R1_DLC_Pos) |
Data Length Code mask.
Definition at line 349 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_DLC_Pos
| #define FDCAN_SRAM_RXFIFO_R1_DLC_Pos 16U |
Data Length Code position.
Definition at line 347 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_EFC
| #define FDCAN_SRAM_RXFIFO_R1_EFC FDCAN_SRAM_RXFIFO_R1_EFC_Msk |
Event FIFO Control.
Definition at line 333 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_EFC_DISABLE
| #define FDCAN_SRAM_RXFIFO_R1_EFC_DISABLE (0x0U << FDCAN_SRAM_RXFIFO_R1_EFC_Pos) |
Do not store Rx events.
Definition at line 367 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_EFC_Msk
| #define FDCAN_SRAM_RXFIFO_R1_EFC_Msk (0x1U << FDCAN_SRAM_RXFIFO_R1_EFC_Pos) |
Event FIFO Control mask.
Definition at line 331 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_EFC_Pos
| #define FDCAN_SRAM_RXFIFO_R1_EFC_Pos 23U |
Event FIFO Control position.
Definition at line 329 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_EFC_STORE_EVENTS
| #define FDCAN_SRAM_RXFIFO_R1_EFC_STORE_EVENTS (0x1U << FDCAN_SRAM_RXFIFO_R1_EFC_Pos) |
Store Rx events.
Definition at line 369 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_FDF
| #define FDCAN_SRAM_RXFIFO_R1_FDF FDCAN_SRAM_RXFIFO_R1_FDF_Msk |
FD Format.
Definition at line 339 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_FDF_CLASSIC
| #define FDCAN_SRAM_RXFIFO_R1_FDF_CLASSIC (0x0U << FDCAN_SRAM_RXFIFO_R1_FDF_Pos) |
Classic CAN format.
Definition at line 371 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_FDF_FD
| #define FDCAN_SRAM_RXFIFO_R1_FDF_FD (0x1U << FDCAN_SRAM_RXFIFO_R1_FDF_Pos) |
CAN FD format.
Definition at line 373 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_FDF_Msk
| #define FDCAN_SRAM_RXFIFO_R1_FDF_Msk (0x1U << FDCAN_SRAM_RXFIFO_R1_FDF_Pos) |
FD Format mask.
Definition at line 337 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_R1_FDF_Pos
| #define FDCAN_SRAM_RXFIFO_R1_FDF_Pos 21U |
FD Format position.
Definition at line 335 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_RXFIFO_SIZE
| #define FDCAN_SRAM_RXFIFO_SIZE 54U |
Rx FIFO size.
Definition at line 359 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TBSA
| #define FDCAN_SRAM_TBSA 0x9EU |
Tx Buffer Start Address.
Definition at line 136 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_SIZE
| #define FDCAN_SRAM_TXBUFFER_SIZE 18U |
Tx buffer size.
Definition at line 281 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_ESI
| #define FDCAN_SRAM_TXBUFFER_T0_ESI FDCAN_SRAM_TXBUFFER_T0_ESI_Msk |
Error State Indicator.
Definition at line 235 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_ESI_Msk
| #define FDCAN_SRAM_TXBUFFER_T0_ESI_Msk (0x1U << FDCAN_SRAM_TXBUFFER_T0_ESI_Pos) |
Error State Indicator mask.
Definition at line 233 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_ESI_PASSIVE_FLAG
| #define FDCAN_SRAM_TXBUFFER_T0_ESI_PASSIVE_FLAG (0x0U << FDCAN_SRAM_TXBUFFER_T0_ESI_Pos) |
ESI bit in CAN FD format depends only on error passive flag.
Definition at line 283 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_ESI_Pos
| #define FDCAN_SRAM_TXBUFFER_T0_ESI_Pos 31U |
Error State Indicator position.
Definition at line 231 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_ESI_RECESSIVE
| #define FDCAN_SRAM_TXBUFFER_T0_ESI_RECESSIVE (0x1U << FDCAN_SRAM_TXBUFFER_T0_ESI_Pos) |
ESI bit in CAN FD format transmitted recessive.
Definition at line 285 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_ID_Pos
| #define FDCAN_SRAM_TXBUFFER_T0_ID_Pos 18U |
Standard Identifier position.
Definition at line 249 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_RTR
| #define FDCAN_SRAM_TXBUFFER_T0_RTR FDCAN_SRAM_TXBUFFER_T0_RTR_Msk |
Remote transmission request.
Definition at line 247 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_RTR_Msk
| #define FDCAN_SRAM_TXBUFFER_T0_RTR_Msk (0x1U << FDCAN_SRAM_TXBUFFER_T0_RTR_Pos) |
Remote transmission request mask.
Definition at line 245 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_RTR_Pos
| #define FDCAN_SRAM_TXBUFFER_T0_RTR_Pos 29U |
Remote transmission request position.
Definition at line 243 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_XTD
| #define FDCAN_SRAM_TXBUFFER_T0_XTD FDCAN_SRAM_TXBUFFER_T0_XTD_Msk |
Extended Identifier.
Definition at line 241 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_XTD_Msk
| #define FDCAN_SRAM_TXBUFFER_T0_XTD_Msk (0x1U << FDCAN_SRAM_TXBUFFER_T0_XTD_Pos) |
Extended Identifier mask.
Definition at line 239 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T0_XTD_Pos
| #define FDCAN_SRAM_TXBUFFER_T0_XTD_Pos 30U |
Extended Identifier position.
Definition at line 237 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_BRS
| #define FDCAN_SRAM_TXBUFFER_T1_BRS FDCAN_SRAM_TXBUFFER_T1_BRS_Msk |
Bit Rate Switching.
Definition at line 267 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_BRS_Msk
| #define FDCAN_SRAM_TXBUFFER_T1_BRS_Msk (0x1U << FDCAN_SRAM_TXBUFFER_T1_BRS_Pos) |
Bit Rate Switching mask.
Definition at line 265 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_BRS_OFF
| #define FDCAN_SRAM_TXBUFFER_T1_BRS_OFF (0x0U << FDCAN_SRAM_TXBUFFER_T1_BRS_Pos) |
Disable CAN FD bit rate switching.
Definition at line 295 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_BRS_ON
| #define FDCAN_SRAM_TXBUFFER_T1_BRS_ON (0x1U << FDCAN_SRAM_TXBUFFER_T1_BRS_Pos) |
Enable CAN FD bit rate switching.
Definition at line 297 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_BRS_Pos
| #define FDCAN_SRAM_TXBUFFER_T1_BRS_Pos 20U |
Bit Rate Switching position.
Definition at line 263 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_DLC
| #define FDCAN_SRAM_TXBUFFER_T1_DLC FDCAN_SRAM_TXBUFFER_T1_DLC_Msk |
Data Length Code.
Definition at line 273 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_DLC_Msk
| #define FDCAN_SRAM_TXBUFFER_T1_DLC_Msk (0xFU << FDCAN_SRAM_TXBUFFER_T1_DLC_Pos) |
Data Length Code mask.
Definition at line 271 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_DLC_Pos
| #define FDCAN_SRAM_TXBUFFER_T1_DLC_Pos 16U |
Data Length Code position.
Definition at line 269 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_EFC
| #define FDCAN_SRAM_TXBUFFER_T1_EFC FDCAN_SRAM_TXBUFFER_T1_EFC_Msk |
Event FIFO Control.
Definition at line 255 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_EFC_DISABLE
| #define FDCAN_SRAM_TXBUFFER_T1_EFC_DISABLE (0x0U << FDCAN_SRAM_TXBUFFER_T1_EFC_Pos) |
Do not store Tx events.
Definition at line 287 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_EFC_Msk
| #define FDCAN_SRAM_TXBUFFER_T1_EFC_Msk (0x1U << FDCAN_SRAM_TXBUFFER_T1_EFC_Pos) |
Event FIFO Control mask.
Definition at line 253 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_EFC_Pos
| #define FDCAN_SRAM_TXBUFFER_T1_EFC_Pos 23U |
Event FIFO Control position.
Definition at line 251 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_EFC_STORE_EVENTS
| #define FDCAN_SRAM_TXBUFFER_T1_EFC_STORE_EVENTS (0x1U << FDCAN_SRAM_TXBUFFER_T1_EFC_Pos) |
Store Tx events.
Definition at line 289 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_FDF
| #define FDCAN_SRAM_TXBUFFER_T1_FDF FDCAN_SRAM_TXBUFFER_T1_FDF_Msk |
FD Format.
Definition at line 261 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_FDF_CLASSIC
| #define FDCAN_SRAM_TXBUFFER_T1_FDF_CLASSIC (0x0U << FDCAN_SRAM_TXBUFFER_T1_FDF_Pos) |
Classic CAN format.
Definition at line 291 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_FDF_FD
| #define FDCAN_SRAM_TXBUFFER_T1_FDF_FD (0x1U << FDCAN_SRAM_TXBUFFER_T1_FDF_Pos) |
CAN FD format.
Definition at line 293 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_FDF_Msk
| #define FDCAN_SRAM_TXBUFFER_T1_FDF_Msk (0x1U << FDCAN_SRAM_TXBUFFER_T1_FDF_Pos) |
FD Format mask.
Definition at line 259 of file fdcandev_stm32.h.
◆ FDCAN_SRAM_TXBUFFER_T1_FDF_Pos
| #define FDCAN_SRAM_TXBUFFER_T1_FDF_Pos 21U |
FD Format position.
Definition at line 257 of file fdcandev_stm32.h.
◆ FDCAN_STM32_NB_EXT_FILTER
| #define FDCAN_STM32_NB_EXT_FILTER 8U |
Number of extended filters.
Definition at line 64 of file fdcandev_stm32.h.
◆ FDCAN_STM32_NB_FILTER
| #define FDCAN_STM32_NB_FILTER (FDCAN_STM32_NB_STD_FILTER + FDCAN_STM32_NB_EXT_FILTER) |
Total number of filters.
Definition at line 65 of file fdcandev_stm32.h.
◆ FDCAN_STM32_NB_STD_FILTER
| #define FDCAN_STM32_NB_STD_FILTER 28U |
Number of standard filters.
Definition at line 63 of file fdcandev_stm32.h.
◆ FDCAN_STM32_RX_MAILBOXES
| #define FDCAN_STM32_RX_MAILBOXES (FDCANDEV_STM32_CHAN_NUMOF * 6) |
Maximum number of frame the driver can receive simultaneously.
There are 3 buffers per FIFO and 2 FIFO per channel.
Definition at line 116 of file fdcandev_stm32.h.
◆ FDCAN_STM32_TX_MAILBOXES
| #define FDCAN_STM32_TX_MAILBOXES 3 |
Number of frame the driver can transmit simultaneously.
Definition at line 114 of file fdcandev_stm32.h.
◆ FDCANDEV_STM32_CHAN_NUMOF
| #define FDCANDEV_STM32_CHAN_NUMOF 1 |
Number of channels in the device (up to 3)
Definition at line 46 of file fdcandev_stm32.h.
◆ FDCANDEV_STM32_DEFAULT_BITRATE
| #define FDCANDEV_STM32_DEFAULT_BITRATE 500000U |
Default bitrate for headers and non-FDCAN messages.
Definition at line 74 of file fdcandev_stm32.h.
◆ FDCANDEV_STM32_DEFAULT_FD_DATA_BITRATE
| #define FDCANDEV_STM32_DEFAULT_FD_DATA_BITRATE 1000000U |
Default FDCAN data bitrate.
Definition at line 78 of file fdcandev_stm32.h.
◆ FDCANDEV_STM32_DEFAULT_SPT
| #define FDCANDEV_STM32_DEFAULT_SPT 875 |
Default sampling-point.
Definition at line 85 of file fdcandev_stm32.h.
◆ HAVE_CAN_CONF_T
| #define HAVE_CAN_CONF_T |
can_conf_t is re-defined
Definition at line 108 of file fdcandev_stm32.h.
◆ HAVE_CAN_T
| #define HAVE_CAN_T |
can_t is re-defined
Definition at line 124 of file fdcandev_stm32.h.
◆ ISR_FDCAN1_IT0
| #define ISR_FDCAN1_IT0 isr_fdcan1_it0 |
Interrupt line 0.
Definition at line 55 of file fdcandev_stm32.h.
◆ ISR_FDCAN1_IT1
| #define ISR_FDCAN1_IT1 isr_fdcan1_it1 |
Interrupt line 1.
Definition at line 56 of file fdcandev_stm32.h.
