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cpu_conf_kinetis_w.h
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/*
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* Copyright (C) 2017 Eistec AB
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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#ifndef CPU_CONF_KINETIS_W_H
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#define CPU_CONF_KINETIS_W_H
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#if defined(KINETIS_CORE_D)
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/* Kinetis KW2xD */
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#if defined(CPU_MODEL_MKW21D256VHA5) || \
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defined(CPU_MODEL_MKW21D512VHA5)
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#include "vendor/MKW21D5.h"
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#elif defined(CPU_MODEL_MKW22D512VHA5)
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#include "vendor/MKW22D5.h"
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#elif defined(CPU_MODEL_MKW24D512VHA5)
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#include "vendor/MKW24D5.h"
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#endif
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#define KINETIS_HAVE_ADICLK_BUS_DIV_2 1
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#define KW2XDRF_PORT_DEV PORTB
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#define KW2XDRF_PORT PORT_B
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#define KW2XDRF_GPIO GPIOB
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#define KW2XDRF_PORT_IRQn PORTB_IRQn
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#define KW2XDRF_PORT_CLKEN() (BITBAND_REG32(SIM->SCGC5, SIM_SCGC5_PORTB_SHIFT) = 1)
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#define KW2XDRF_PIN_AF 2
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#define KW2XDRF_PCS0_PIN 10
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#define KW2XDRF_SCK_PIN 11
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#define KW2XDRF_SOUT_PIN 16
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#define KW2XDRF_SIN_PIN 17
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#define KW2XDRF_RST_PIN 19
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#define KW2XDRF_IRQ_PIN 3
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#define KW2XDRF_CLK_CTRL_PORT PORT_C
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#define KW2XDRF_CLK_CTRL_PORT_DEV PORTC
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#define KW2XDRF_CLK_CTRL_GPIO GPIOC
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#define KW2XDRF_CLK_CTRL_CLKEN() (BITBAND_REG32(SIM->SCGC5, SIM_SCGC5_PORTC_SHIFT) = 1)
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#define KW2XDRF_CLK_CTRL_PIN 0
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#elif defined(KINETIS_CORE_Z)
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/* Kinetis KWxxZ */
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#if defined(CPU_MODEL_MKW21Z256VHT4) || \
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defined(CPU_MODEL_MKW21Z512VHT4)
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#include "vendor/MKW21Z4.h"
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#elif defined(CPU_MODEL_MKW31Z256VHT4) || \
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defined(CPU_MODEL_MKW31Z512CAT4) || \
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defined(CPU_MODEL_MKW31Z512VHT4)
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#include "vendor/MKW31Z4.h"
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#elif defined(CPU_MODEL_MKW41Z256VHT4) || \
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defined(CPU_MODEL_MKW41Z512CAT4) || \
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defined(CPU_MODEL_MKW41Z512VHT4)
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#include "vendor/MKW41Z4.h"
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#endif
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#endif
/* KINETIS_CORE_x */
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#define FLASHPAGE_SIZE (2048U)
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#define FLASHPAGE_NUMOF ((KINETIS_ROMSIZE * 1024) / FLASHPAGE_SIZE)
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/* The minimum block size which can be written is 4B. However, the erase
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* block is always FLASHPAGE_SIZE.
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*/
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#define FLASHPAGE_WRITE_BLOCK_SIZE (4U)
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/* Writing should be always 4 bytes aligned */
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#define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
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/* Section erase and programming must be 8 bytes aligned */
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#define FLASHPAGE_BLOCK_SECTION_ALIGNMENT (8U)
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#ifdef __cplusplus
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extern
"C"
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{
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
/* CPU_CONF_KINETIS_W_H */
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